Scaling trends of digital single-event effects: A survey of SEU and SET parameters and comparison with transistor performance

D Kobayashi - IEEE Transactions on Nuclear Science, 2020 - ieeexplore.ieee.org
The history of integrated circuit (IC) development is another record of human challenges
involving space. Efforts have been made to protect ICs from sudden malfunctions due to …

Soft error rate improvements in 14-nm technology featuring second-generation 3D tri-gate transistors

N Seifert, S Jahinuzzaman, J Velamala… - … on Nuclear Science, 2015 - ieeexplore.ieee.org
We report on radiation-induced soft error rate (SER) improvements in the 14-nm second
generation high-k+ metal gate bulk tri-gate technology. Upset rates of memory cells …

Impact of scaling on the soft error sensitivity of bulk, FDSOI and FinFET technologies due to atmospheric radiation

G Hubert, L Artola, D Regis - Integration, 2015 - Elsevier
This paper investigates the impact of terrestrial radiation on soft error (SE) sensitivity along
the very large-scale integration (VLSI) roadmap of bulk, FDSOI and finFET nano-scale …

[图书][B] Soft Errors: from particles to circuits

JL Autran, D Munteanu - 2017 - books.google.com
Soft errors are a multifaceted issue at the crossroads of applied physics and engineering
sciences. Soft errors are by nature multiscale and multiphysics problems that combine not …

Soft error reliability in advanced CMOS technologies-trends and challenges

D Tang, CH He, YH Li, H Zang, C Xiong… - Science China …, 2014 - Springer
With the decrease of the device size, soft error induced by various particles becomes a
serious problem for advanced CMOS technologies. In this paper, we review the evolution of …

Characterizing SRAM and FF soft error rates with measurement and simulation

M Hashimoto, K Kobayashi, J Furuta, SI Abe… - Integration, 2019 - Elsevier
Soft error originating from cosmic ray is a serious concern for reliability demanding
applications, such as autonomous driving, supercomputer, and public transportation system …

Electron-induced single-event upsets in static random access memory

MP King, RA Reed, RA Weller… - … on Nuclear Science, 2013 - ieeexplore.ieee.org
We present experimental evidence of single-event upsets in 28 and 45 nm CMOS SRAMs
produced by single energetic electrons. Upsets are observed within 10% of nominal supply …

Duckcore: A fault-tolerant processor core architecture based on the risc-v isa

J Li, S Zhang, C Bao - Electronics, 2021 - mdpi.com
With the development of large-scale CMOS-integrated circuit manufacturing technology,
microprocessor chips are more vulnerable to soft errors and radiation interference, resulting …

Qufi: a quantum fault injector to measure the reliability of qubits and quantum circuits

D Oliveira, E Giusto, E Dri, N Casciola… - 2022 52nd Annual …, 2022 - ieeexplore.ieee.org
Quantum computing is an up-and-coming technology that is expected to revolutionize the
computation paradigm in the next few years. Qubits, the primary computing elements of …

Lightweight checkpoint technique for resilience against soft errors

M Didehban, SRD Lokam, A Shrivastava - US Patent 10,997,027, 2021 - Google Patents
Abstract Systems and methods for implementing a lightweight checkpoint technique for
resilience against soft errors are disclosed. The technique provides effective, safe, and …