A survey of SRAM-based in-memory computing techniques and applications
As von Neumann computing architectures become increasingly constrained by data-
movement overheads, researchers have started exploring in-memory computing (IMC) …
movement overheads, researchers have started exploring in-memory computing (IMC) …
A reconfigurable 16Kb AND8T SRAM macro with improved linearity for multibit compute-in memory of artificial intelligence edge devices
Compute-in Memory (CIM) has been a promising candidate to perform the energy-efficient
multiply-and-accumulate (MAC) operations of the modern Artificial Intelligence (AI) edge …
multiply-and-accumulate (MAC) operations of the modern Artificial Intelligence (AI) edge …
Cost-Effective Data Mining Application Covid-19 Analyzer
V Sharma, S Saraswat, S Verma… - 2021 5th International …, 2021 - ieeexplore.ieee.org
The idea of data mining has been around for longer than a century, yet come into a more
prominent public core interest in the 1930s. As time passed, the measure of information in …
prominent public core interest in the 1930s. As time passed, the measure of information in …
BNN an ideal architecture for acceleration with resistive in memory computation
Binary Neural Networks (BNN) have binarized (-1 and 1) weights and feature maps.
Achieving smaller model sizes and computational simplicity, they are well suited for edge-AI …
Achieving smaller model sizes and computational simplicity, they are well suited for edge-AI …
[HTML][HTML] Custom Memory Design for Logic-in-Memory: Drawbacks and Improvements over Conventional Memories
The speed of modern digital systems is severely limited by memory latency (the “Memory
Wall” problem). Data exchange between Logic and Memory is also responsible for a large …
Wall” problem). Data exchange between Logic and Memory is also responsible for a large …
An in-Memory-Computing Binary Neural Network Architecture with In-Memory Batch Normalization
P Rege, M Yin, S Parihar, J Versaggi… - IEEE …, 2024 - ieeexplore.ieee.org
This paper describes an in-memory computing architecture that combines full-precision
computation for the first and last layers of a neural network while employing binary weights …
computation for the first and last layers of a neural network while employing binary weights …
Adaptive prairie dog optimization based variable length conditional counter for designing multiplier
P Poongodi - Integration, 2024 - Elsevier
Binary counters (BC) are electronic devices that are used for counting the particular events
that have been happened, followed by storing and displaying the count numbers. BC …
that have been happened, followed by storing and displaying the count numbers. BC …
In-Memory-Computing (IMC) Technique in Local Difference Decision Block of an On-Board Satellite Hyperspectral Data Compression Algorithm
V Joshi - 2023 IEEE 66th International Midwest Symposium …, 2023 - ieeexplore.ieee.org
Due to high data acquisition rates and large data volumes, on-board hyperspectral imagery
(HSI) demands data compression before transmission. The major bottleneck in on-board …
(HSI) demands data compression before transmission. The major bottleneck in on-board …
Current mode multiply-accumulate for compute in memory binarized neural networks
AT Far - US Patent 10,915,298, 2021 - Google Patents
Methods of performing mixed-signal current-mode multi ply-accumulate (MAC) operations
for binarized neural net works in an integrated circuit are described in this disclo sure. While …
for binarized neural net works in an integrated circuit are described in this disclo sure. While …
A Variation-Aware Binary Neural Network Framework for Process Resilient In-Memory Computations
Binary neural networks (BNNs) that use 1-bit weights and activations have garnered interest
as extreme quantization provides low power dissipation. By implementing BNNs as …
as extreme quantization provides low power dissipation. By implementing BNNs as …