Compiling for reconfigurable computing: A survey
Reconfigurable computing platforms offer the promise of substantially accelerating
computations through the concurrent nature of hardware structures and the ability of these …
computations through the concurrent nature of hardware structures and the ability of these …
Modern development methods and tools for embedded reconfigurable systems: A survey
Heterogeneous reconfigurable systems provide drastically higher performance and lower
power consumption than traditional CPU-centric systems. Moreover, they do it at much lower …
power consumption than traditional CPU-centric systems. Moreover, they do it at much lower …
PACT XPP—A self-reconfigurable data processing architecture
V Baumgarte, G Ehlers, F May, A Nückel… - the Journal of …, 2003 - Springer
Abstract The eXtreme Processing Platform (XPP TM) is a new runtime-reconfigurable data
processing architecture. It is based on a hierarchical array of coarsegrain, adaptive …
processing architecture. It is based on a hierarchical array of coarsegrain, adaptive …
[图书][B] Handbook of signal processing systems
In this new edition of the Handbook of Signal Processing Systems, many of the chapters
from the previous editions have been updated, and several new chapters have been added …
from the previous editions have been updated, and several new chapters have been added …
Data processing method and device
M Vorbach, J Becker, M Weinhardt… - US Patent …, 2012 - Google Patents
2005-08-05 Assigned to PACT XPP TECHNOLOGIES AG reassignment PACT XPP
TECHNOLOGIES AG ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR …
TECHNOLOGIES AG ASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR …
Spatial computation
M Budiu, G Venkataramani, T Chelcea… - Proceedings of the 11th …, 2004 - dl.acm.org
This paper describes a computer architecture, Spatial Computation (SC), which is based on
the translation of high-level language programs directly into hardware structures. SC …
the translation of high-level language programs directly into hardware structures. SC …
Coarse-grained reconfigurable array architectures
BD Sutter, P Raghavan, A Lambrechts - Handbook of signal processing …, 2019 - Springer
Abstract Coarse-Grained Reconfigurable Array (CGRA) architectures accelerate the same
inner loops that benefit from the high instruction-level parallelism (ILP) support in very long …
inner loops that benefit from the high instruction-level parallelism (ILP) support in very long …
Runtime configurable arithmetic and logic cell
M Vorbach, R Münch - US Patent 7,565,525, 2009 - Google Patents
(57) ABSTRACT A cascadable arithmetic and logic unit (ALU) which is con figurable in
function and interconnection. No decoding of commands is needed during execution of the …
function and interconnection. No decoding of commands is needed during execution of the …
An architecture-independent cgra compiler enabling openmp applications
Coarse-Grained reconfigurable architecture (CGRA) is a promising platform for HPC
systems in the post-Moore's era. A single-source programming model is essential for …
systems in the post-Moore's era. A single-source programming model is essential for …
Data processing device and method
M Vorbach, A Thomas - US Patent 8,812,820, 2014 - Google Patents
(57) ABSTRACT A data processing device comprising a multidimensional array of coarse
grained logic elements processing data and operating at a? rst clock rate and …
grained logic elements processing data and operating at a? rst clock rate and …