[PDF][PDF] Flood Prediction Model Simulation With Heterogeneous Trade-Offs In High Performance Computing Framework.

A Portero, R Vavrik, S Kuchar, M Golasowski… - ECMS, 2015 - scs-europe.net
In this paper, we propose a safety-critical system with a run-time resource management that
is used to operate an application for flood monitoring and prediction. This application can …

Improving dynamic memory allocation on many-core embedded systems with distributed shared memory

I Koutras, I Anagnostopoulos, A Bartzas… - IEEE Embedded …, 2016 - ieeexplore.ieee.org
Memory management on many-core architectures is a major challenge for improving the
overall system performance. Memory resources are distributed over nodes for faster local …

A Machine Learning Approach for Improving Power Efficiency on Clustered Multi-Processor System

S Kundan, I Anagnostopoulos - 2020 IEEE International …, 2020 - ieeexplore.ieee.org
Modern embedded systems have adopted the clustered Chip Multi-Processor (CMP)
paradigm in conjunction with dynamic frequency scaling techniques for improving …

Precision-Aware application execution for Energy-optimization in HPC node system

R Vavřík, A Portero, Š Kuchař, M Golasowski… - arXiv preprint arXiv …, 2015 - arxiv.org
Power consumption is a critical consideration in high performance computing systems and it
is becoming the limiting factor to build and operate Petascale and Exascale systems. When …

Resource-Optimized Scheduling for Enhanced Power Efficiency and Throughput on Chip Multi-Processor Platforms

S Kundan - 2024 - search.proquest.com
The parallel nature of process execution on Chip Multi-Processors (CMPs) has boosted
levels of application performance far beyond the capabilities of erstwhile single-core …

[PDF][PDF] 任务敏感的多模式视频编码系统功耗控制方法

曹倩, 李辉勇, 左敏, 姜同强, 蔡强, 王瑜 - 电子学报, 2016 - ejournal.org.cn
在嵌入式多模式视频编码系统中, 动态电压频率调整(Dynamic Voltage and Frequency Scaling,
DVFS) 技术可在一定程序上节约系统能耗, 然而持续降低电压和频率可能影响处理器接口资源 …

Drop: Distributed run-time and power constraint mapping for many-core systems

M Mohammad… - 2018 25th IEEE …, 2018 - ieeexplore.ieee.org
The number of transistors per chip still steadily increases for each technology node
generation. Fabrication processes and computing architectures have enabled the …

Memory-Aware Scheduling for Fixed Priority Hard Real-Time Computing Systems

GA Chaparro-Baquero - 2018 - digitalcommons.fiu.edu
As a major component of a computing system, memory has been a key performance and
power consumption bottleneck in computer system design. While processor speeds have …

Μεθοδολογίες και εργαλεία διαχείρισης πόρων και παραμετροποίησης εφαρμογών κατά το χρόνο εκτέλεσης σε πολυπύρηνες ενσωματωμένες πλατφόρμες

ΗΝ Αναγνωστόπουλος - 2014 - dspace.lib.ntua.gr
Στην παρούσα διδακτορική διατριβή, παρουσιάζουμε (i) μεθολογίες επιτάχυνσης και
παραμετροποίησης της διαχείρισης μνήμης σε επίπεδο middleware για την εφαρμογή …

[PDF][PDF] A Complete Bibliography of ACM Transactions on Embedded Computing Systems (TECS)

NHF Beebe - 2024 - ctan.math.utah.edu
[BCHL19, BCEP12, BM13, CP13a, CDBB24, CKGN14, CC14, CBH22a, CBH22b, CP13b,
DV13, DSD12, Edi13, FM12, GV21b, Goe14, GP07, HCK+08, HTLC10, Hüb13, JB02, JB03 …