Silicon-germanium: properties, growth and applications

YM Haddara, P Ashburn, DM Bagnall - Springer handbook of electronic …, 2017 - Springer
Silicon-germanium is an important material that is used for the fabrication of SiGe
heterojunction bipolar transistors and strained Si metal-oxide-semiconductor (MOS) …

A spacer patterning technology for nanoscale CMOS

YK Choi, TJ King, C Hu - IEEE Transactions on Electron …, 2002 - ieeexplore.ieee.org
A spacer patterning technology using a sacrificial layer and a chemical vapor deposition
(CVD) spacer layer has been developed, and is demonstrated to achieve sub-7 nm …

Improvement of threshold voltage deviation in damascene metal gate transistors

A Yagishita, T Saito, K Nakajima… - … on Electron Devices, 2001 - ieeexplore.ieee.org
The metal gate work function deviation (crystal orientation deviation) was found to cause the
threshold voltage deviation (/spl Delta/V/sub th/) in the damascene metal gate transistors …

Composition, structure, and electrical characteristics of HfO2 gate dielectrics grown using the remote-and direct-plasma atomic layer deposition methods

J Kim, S Kim, H Kang, J Choi, H Jeon, M Cho… - Journal of applied …, 2005 - pubs.aip.org
Hafnium oxide thin films were deposited using both the remote-plasma atomic layer
deposition (RPALD) and direct-plasma atomic layer deposition (DPALD) methods. Metal …

silicon-Germanium: Properties, growth and Applications

P Ashburn, D Bagnall - Springer Handbook of Electronic …, 2007 - ui.adsabs.harvard.edu
Silicon-germanium is an important material that is used for the fabrication of SiGe
heterojunction bipolar transistors and strained Si metal-oxide-semiconductor (MOS) …

High-performance deep submicron CMOS technologies with polycrystalline-SiGe gates

YV Ponomarev, PA Stolk, C Salm… - … on Electron Devices, 2000 - ieeexplore.ieee.org
The use of polycrystalline SiGe as the gate material for deep submicron CMOS has been
investigated. A complete compatibility to standard CMOS processing is demonstrated when …

Observation of reduced boron penetration and gate depletion for poly-Si/sub 0.8/Ge/sub 0.2/gated PMOS devices

WC Lee, TJ King, C Hu - IEEE Electron Device Letters, 1999 - ieeexplore.ieee.org
Poly-Si/sub 0.8/Ge/sub 0.2/-and poly-Si-gated PMOS capacitors with very thin gate oxides
were fabricated. Boron penetration and poly-gate depletion effects (PDE) in these devices …

Analysis of low-frequency noise in boron-doped polycrystalline silicon–germanium resistors

KM Chen, GW Huang, DY Chiu, HJ Huang… - Applied physics …, 2002 - pubs.aip.org
Low-frequency noise in boron-doped polycrystalline silicon–germanium (poly-Si 1− x Ge x)
resistors at various temperatures is studied. The poly-Si 1− x Ge x films with 0%∼ 36% Ge …

Gate current and oxide reliability in p/sup+/poly MOS capacitors with poly-Si and poly-Ge/sub 0.3/Si/sub 0.7/gate material

C Salm, JH Klootwijk, Y Ponomarev… - IEEE Electron …, 1998 - ieeexplore.ieee.org
Fowler-Nordheim (FN) tunnel current and oxide reliability of PRiLOS capacitors with
ap/sup+/polycrystalline silicon (poly-Si) and polycrystalline germanium-silicon (poly-Ge/sub …

The influence of polysilicon gate morphology on dopant activation and deactivation kinetics in deep-submicron CMOS transistors

FN Cubaynes, PA Stolk, J Verhoeven… - Materials Science in …, 2001 - Elsevier
In this paper, the impact of gate microstructure on the activation and deactivation kinetics of
ion-implanted dopants is discussed. A comparison is made between large-grained …