RF-to-Baseband Digitization in 40 nm CMOS With RF Bandpass Modulator and Polyphase Decimation Filter

E Martens, A Bourdoux, A Couvreur… - IEEE Journal of Solid …, 2012 - ieeexplore.ieee.org
A fourth-order continuous-time RF bandpass ΔΣ ADC has been fabricated in 40 nm CMOS
for fs/4 operation around a 2.22 GHz central frequency. A complete system has been …

Mitigation of sampling errors in VCO-based ADCs

V Unnikrishnan, M Vesterbacka - IEEE Transactions on Circuits …, 2017 - ieeexplore.ieee.org
Voltage-controlled-oscillator-based analog-to-digital converter (ADC) is a scaling-friendly
architecture to build ADCs in fine-feature complimentary metal-oxide-semiconductor …

Multiband Microwave Photonic Filters With Tunability and Programmability via Optical Frequency Comb Shaping

M Song, H Choi, Y Jung, T Lee, G Choi… - Journal of Lightwave …, 2023 - ieeexplore.ieee.org
We present the development of tunable programmable multiband microwave photonic filters
with an arbitrary number of passbands, which open a new route to integrate several …

A fully-digital beat-frequency based ADC achieving 39dB SNDR for a 1.6mVpp input signal

B Kim, W Xu, CH Kim - Proceedings of the IEEE 2013 Custom …, 2013 - ieeexplore.ieee.org
A fully-digital VCO-based ADC featuring a novel beat frequency detection scheme is
demonstrated in 65nm LP CMOS. The proposed beat frequency based ADC is unique …

The research and development of a digital meter of parameters of a three-phase network on ADC ADS131E08

O Plakhtii, V Nerubatskyi, D Hordiienko… - 2021 IEEE 16th …, 2021 - ieeexplore.ieee.org
The research describes the results of the study of the developed digital meter of power
quality parameters based on the ADS131E08 ADC. The structure of the developed meter is …

Time-interleaved single-slope ADC using counter-based time-to-digital converter

HT Choi, YH Kim, KS Kim, J Kim… - 2011 IEEE International …, 2011 - ieeexplore.ieee.org
In this paper, a time-domain analog-to-digital converter (ADC) using time-to-digital converter
(TDC) is presented. The use of TDC in ADCs is a promising technique for future scaled …

Worst-case IR-drop monitoring with 1GHz sampling rate

CH Hsu, SY Huang, DM Kwai… - … Design, Automation, and …, 2013 - ieeexplore.ieee.org
IR-drop monitoring has been an effective means to assess the power integrity in real silicon.
Existing methods, however, fail to achieve a high accuracy and a high sampling rate …

A Digital-Intensive Multimode Multiband Receiver Using a Sinc Filter-Embedded VCO-Based ADC

J Kim, W Yu, SH Cho - IEEE transactions on microwave theory …, 2012 - ieeexplore.ieee.org
In this paper, we present a 0.2-1.8-GHz digital-intensive receiver front-end using a voltage-
controlled oscillator (VCO)-based analog-to-digital converter (ADC) running at 1.4 Gs/s in 90 …

Analogue to digital converter

NOH Kyoohyun, JJP De Gyvez, M Vertregt - US Patent 8,988,264, 2015 - Google Patents
The down-scaling of CMOS devices and the emergence of new applications have become
driving forces in the evolution of Analogue-to-Digital Converter (ADC) architecture. Tech …

All-digital PLL frequency and phase noise degradation measurements using simple on-chip monitoring circuits

G Park, M Kim, CH Kim, B Kim… - 2018 IEEE International …, 2018 - ieeexplore.ieee.org
Using simple on-chip monitoring circuits, we precisely characterized the impact of hot carrier
injection and bias temperature instability on frequency and phase noise degradation of a …