One of the cost-efficient fabrication approaches for connecting layers in three-dimensional
integrated circuits (3D ICs) is the use of through-silicon vias (TSVs). However, the large and …

The cost of transferring data between the off-chip memory system and compute unit is the
fundamental energy and performance bottleneck in modern computing systems …

TSV-to-TSV coupling is known to be a significant detriment to signal integrity in three-
dimensional (3D) IC architectures. Designing a reliable Through-Silicon Via is critical in …

TSV-based 3D-NoC has been introduced as a viable solution for integrating more cores on
a chip, while imposing smaller footprint area and better timing performance as compared to …

Migration to Three Dimensional Integrated Circuits (3D ICs) can provide higher scalability,
higher throughput, and lower power consumption with respect to Two Dimensional …

Many-core systems are of great importance for building the exascale computing machine
targeted for 2020. Last-Level Cache (LLC), as the largest on-chip shared memory in many …

Technology scaling and higher operational frequencies are no longer sustainable at the
same pace as before. The processor industry is rapidly moving from a single core with high …

Like every other major changes in computer architecture, exascale computing, targeted for
2020, requires dramatic and unanticipated shifts in different perspectives. The biggest …