Variability in architectural simulations of multi-threaded workloads

AR Alameldeen, DA Wood - The Ninth International …, 2003 - ieeexplore.ieee.org
Multi-threaded commercial workloads implement many important Internet services.
Consequently, these workloads are increasingly used to evaluate the performance of …

A UVM-based smart functional verification platform: Concepts, pros, cons, and opportunities

K Salah - 2014 9th International Design and Test symposium …, 2014 - ieeexplore.ieee.org
SoC Verification is one of the hot issues in VLSI. More than 70 percent of the time is spent on
verification. So, there is a need for constructing a reusable and robust verification …

[PDF][PDF] Evaluating non-deterministic multi-threaded commercial workloads

AR Alameldeen, CJ Mauer, M Xu… - Proceedings of the …, 2002 - research.cs.wisc.edu
Full-system simulation is increasingly used to evaluate the performance of commercial
workloads on future multiprocessor designs. However, challenges such as simulation …

HMTT: a platform independent full-system memory trace monitoring system

Y Bao, M Chen, Y Ruan, L Liu, J Fan, Q Yuan… - Proceedings of the …, 2008 - dl.acm.org
Memory trace analysis is an important technology for architecture research, system software
(ie, OS, compiler) optimization, and application performance improvements. Many …

Bandwidth adaptive snooping

MMK Martin, DJ Sorin, MD Hill… - … Symposium on High …, 2002 - ieeexplore.ieee.org
This paper advocates that cache coherence protocols use a bandwidth adaptive approach
to adjust to varied system configurations (eg, number of processors) and workload …

Exploring the cache design space for large scale CMPs

L Hsu, R Iyer, S Makineni, S Reinhardt… - ACM SIGARCH …, 2005 - dl.acm.org
With the advent of dual-core chips in the marketplace, small-scale CMP (chip
multiprocessor) architectures are becoming commonplace. We expect a continuing trend of …

CANDID: Comparison algorithm for navigating digital image databases

PM Kelly, TM Cannon - Seventh International Working …, 1994 - ieeexplore.ieee.org
In this paper, we propose a method for calculating the similarity between two digital images.
A global signature describing the texture, shape, or color content is first computed for every …

Method and apparatus for optimal cache sizing and configuration for large memory systems

JA Bivens, P Dube, MM Tsao, L Zhang - US Patent 8,527,704, 2013 - Google Patents
(51) Int. Cl. G06F 2/08(2006.01) A method for configuring a large hybrid memory Subsystem
G06F II/34(2006.01) having a large cache size in a computing system where one or (52) US …

A performance methodology for commercial servers

SR Kunkel, RJ Eickemeyer, MH Lipasti… - IBM Journal of …, 2000 - ieeexplore.ieee.org
This paper discusses a methodology for analyzing and optimizing the performance of
commercial servers. Commercial server workloads are shown to have unique characteristics …

HMTT: A hybrid hardware/software tracing system for bridging the DRAM access trace's semantic gap

Y Huang, L Chen, Z Cui, Y Ruan, Y Bao… - ACM Transactions on …, 2014 - dl.acm.org
DRAM access traces (ie, off-chip memory references) can be extremely valuable for the
design of memory subsystems and performance tuning of software. Hardware snooping on …