A 3rd-order FIR filter implementation based on time-mode signal processing

O Panetas-Felouris, S Vlassis - Electronics, 2022 - mdpi.com
This paper presents the hardware implementation of a 3rd-order low-pass finite impulse
response (FIR) filter based on time-mode signal processing circuits. The filter topology …

A Time-Domain z−1 Circuit with Digital Calibration

O Panetas-Felouris, S Vlassis - Journal of Low Power Electronics and …, 2022 - mdpi.com
This paper presents a novel circuit of az− 1 operation which is suitable, as a basic building
block, for time-domain topologies and signal processing. The proposed circuit employs a …

A Time-Mode PWM 1st Order Low-Pass Filter

KP Pagkalos, O Panetas-Felouris, S Vlassis - Journal of Low Power …, 2023 - mdpi.com
In this work, a first-order low-pass filter is proposed as suitable for time-mode PWM signal
processing. In time-mode PWM signal processing, the pulse width of a rectangular pulse is …

Time-to-digital converter with current-steering vernier time integrator

P Parekh, F Yuan, Y Zhou - Analog Integrated Circuits and Signal …, 2023 - Springer
This paper investigates a number of design techniques to improve the linearity of gated
Vernier delay line time integrators and their applications in Δ Σ time-to-digital converters …

VLSI Architecture of Time-Mode Pulse Width Modulation First Order Low-Pass Filter

N Ashokkumar, P Nagarajan… - … and Control for …, 2023 - ieeexplore.ieee.org
The fundamentals of a low pass filter of the first order. The removal of high frequency noise
from an audio signal may be accomplished with the assistance of low pass filters, which …

[PDF][PDF] A Time-Mode PWM 1st Order Low-Pass Filter. J. Low Power Electron. Appl. 2023, 13, 32

KP Pagkalos, O Panetas-Felouris, S Vlassis - 2023 - academia.edu
In this work, a first-order low-pass filter is proposed as suitable for time-mode PWM signal
processing. In time-mode PWM signal processing, the pulse width of a rectangular pulse is …

A 0.18 pJ/Step Time-Domain 1st Order ΔΣ Capacitance-to-Digital Converter in 65-nm CMOS

A Karmakar, V De Smedt… - 2021 IEEE International …, 2021 - ieeexplore.ieee.org
This work presents a capacitance-to-digital converter (CDC) fully designed using time-
domain circuits following the principle of a dual quantization based first-order ΔΣ modulator …

[PDF][PDF] A 3rd-Order FIR Filter Implementation Based on Time-Mode Signal Processing. Electronics 2022, 11, 902

O Panetas-Felouris, S Vlassis - 2022 - academia.edu
This paper presents the hardware implementation of a 3rd-order low-pass finite impulse
response (FIR) filter based on time-mode signal processing circuits. The filter topology …

[图书][B] Integrated Time-based Signal Processing Circuits for Harsh Radiation Environments

A Karmakar, V De Smedt, P Leroux - 2023 - Springer
This research primarily focuses on designing and implementing new architectures for
integrated data converters based on time-based signal processing for critical reliability …