A data-flow execution engine for scalable embedded computing

M Procaccini, R Giorgi - Acaces Poster Abstract 2017, 2017 - usiena-air.unisi.it
Nowadays embedded systems are increasingly used in the world of distributed computing to
provide more computational power without having to change the whole system and the …

[PDF][PDF] An FPGA-Based Scalable Hardware Scheduler For Data-Flow Models

R Giorgi, M Procaccini, F Khalili - Proceedings of International …, 2018 - eascitech.eu.org
An FPGA-Based Scalable Hardware Scheduler For Data-Flow Models Page 1 IWES 2018 Third
Italian Workshop on Embedded Systems Siena – 13-14 September 2018 An FPGA-Based …

A Dynamic Load Balancer for a Cluster of FPGA SoCs

F KHALILI MAYBODI, R Giorgi - … Computer Architecture and …, 2020 - usiena-air.unisi.it
In many-core systems to achieve maximum performance, it is desirable to produce many
tasks more than the cores and efficiently distribute those tasks among available resources …