A review of gate tunneling current in MOS devices
Gate current in metal–oxide–semiconductor (MOS) devices, caused by carriers tunneling
through a classically forbidden energy barrier, is studied in this paper. The physical …
through a classically forbidden energy barrier, is studied in this paper. The physical …
PSP: An advanced surface-potential-based MOSFET model for circuit simulation
G Gildenblat, X Li, W Wu, H Wang, A Jha… - … on Electron Devices, 2006 - ieeexplore.ieee.org
This paper describes the latest and most advanced surface-potential-based model jointly
developed by The Pennsylvania State University and Philips. Specific topics include model …
developed by The Pennsylvania State University and Philips. Specific topics include model …
Analog circuits in ultra-deep-submicron CMOS
Modern and future ultra-deep-submicron (UDSM) technologies introduce several new
problems in analog design. Nonlinear output conductance in combination with reduced …
problems in analog design. Nonlinear output conductance in combination with reduced …
Noise modeling for RF CMOS circuit simulation
AJ Scholten, LF Tiemeijer… - … on Electron Devices, 2003 - ieeexplore.ieee.org
The RF noise in 0.18-/spl mu/m CMOS technology has been measured and modeled. In
contrast to some other groups, we find only a moderate enhancement of the drain current …
contrast to some other groups, we find only a moderate enhancement of the drain current …
Cmos technology for ms/rf soc
Accelerated scaling of CMOS technology has contributed to remove otherwise fundamental
barriers preempting its widespread application to mixed-signal/radio-frequency (MS/RF) …
barriers preempting its widespread application to mixed-signal/radio-frequency (MS/RF) …
[图书][B] MOSFET modeling for circuit analysis and design
C Galup-Montoro - 2007 - books.google.com
This is the first book dedicated to the next generation of MOSFET models. Addressed to
circuit designers with an in-depth treatment that appeals to device specialists, the book …
circuit designers with an in-depth treatment that appeals to device specialists, the book …
A Sub- Bandgap Reference Circuit With an Inherent Curvature-Compensation Property
A new current-mode bandgap reference circuit (BGR) which is capable of generating sub-1-
V output voltage is presented. It has not only the lowest theoretical minimum current …
V output voltage is presented. It has not only the lowest theoretical minimum current …
SP: An advanced surface-potential-based compact MOSFET model
G Gildenblat, H Wang, TL Chen, X Gu… - IEEE Journal of Solid …, 2004 - ieeexplore.ieee.org
This work describes an advanced physics-based compact MOSFET model (SP). Both the
quasistatic and nonquasi-static versions of SP are surface-potential-based. The model is …
quasistatic and nonquasi-static versions of SP are surface-potential-based. The model is …
[图书][B] Compact models for integrated circuit design: conventional transistors and beyond
SK Saha - 2015 - library.oapen.org
This modern treatise on compact models for circuit computer-aided design (CAD) presents
industry standard models for bipolar-junction transistors (BJTs), metal-oxide-semiconductor …
industry standard models for bipolar-junction transistors (BJTs), metal-oxide-semiconductor …
Quasi-static and nonquasi-static compact MOSFET models based on symmetric linearization of the bulk and inversion charges
H Wang, TL Chen, G Gildenblat - IEEE Transactions on Electron …, 2003 - ieeexplore.ieee.org
A particularly simple form of the charge-sheet model (CSM) is developed using symmetric
linearization of the bulk charge as a function of the surface potential. The new formulation is …
linearization of the bulk charge as a function of the surface potential. The new formulation is …