Impact of variation in nanoscale silicon and non-silicon FinFETs and tunnel FETs on device and SRAM performance

N Agrawal, H Liu, R Arghavani… - … on Electron Devices, 2015 - ieeexplore.ieee.org
One of the key challenges in scaling beyond 10-nm technology node is device-to-device
variation. Variation in device performance, mainly threshold voltage, VT, inhibits V CC …

In0.53Ga0.47As-Based nMOSFET Design for Low Standby Power Applications

KK Bhuwalka, Z Wu, HK Noh, W Lee… - … on Electron Devices, 2015 - ieeexplore.ieee.org
III–V n-channel MOSFETs based on In x Ga 1− x As are evaluated for low-power (LP)
technology at a sub-10-nm technology node. Aggressive design rules are followed, while …

Impact of Sidewall Passivation and Channel Composition on InxGa1-xAs FinFET Performance

AV Thathachary, G Lavallee, M Cantoro… - IEEE Electron …, 2014 - ieeexplore.ieee.org
We experimentally demonstrate In x Ga 1-x A s FinFET devices with varying indium
composition and quantum confinement effect. While increasing indium content enhances …

Effect of varying Indium concentration of InGaAs channel on device and circuit performance of nanoscale double gate heterostructure MOSFET

K Biswas, A Sarkar, CK Sarkar - Micro & Nano Letters, 2018 - Wiley Online Library
The detailed numerical analysis is performed to study and evaluate the impact of Indium (In)
concentrations of the Indium gallium arsenide (InGaAs) channel on different device …

Impact of Varying Indium(x) Concentration and Quantum Confinement on PBTI Reliability in InxGa1-xAs FinFET

N Agrawal, AV Thathachary… - IEEE Electron Device …, 2014 - ieeexplore.ieee.org
In this letter, we present a comparative study of positive bias temperature instability (PBTI)
reliability in In x Ga 1-x As FinFET with varying Indium (x= 0.53, 0.70) percentage and …

State of the Art and Future Perspectives in III-V Nanometer-Scale MOSFETs

S Dey, K Biswas, A Sarkar - 2022 IEEE VLSI Device Circuit and …, 2022 - ieeexplore.ieee.org
The downscaling of transistors being the biggest challenge in terms of gate length in
nanometer scale faces hindrances due to short channel effects and gate leakage current …

[图书][B] Physics, fabrication and characterization of III-V multi-gate FETs for low power electronics

AV Thathachary - 2015 - search.proquest.com
With transistor technology close to its limits for power constrained scaling and the
simultaneous emergence of mobile devices as the dominant driver for new scaling, a …

[图书][B] Novel Silicon and Non-Silicon Transistors for Low Power Logic Applications

JA Smith - 2021 - search.proquest.com
The power constrained scaling of conventional Silicon Metal-Oxide-Semiconductor Field
Effect Transistors (MOSFETs) below the 90nm technology node has led to innovations such …

Study and design of emerging nanoscale mosfets

K Biswas - 2018 - 20.198.91.3
Conventional MOSFET structures are reaching scaling limits and Short-Channel Effects
(SCEs) have become most important issue for device performance. With the reduction in …

Variation Study on Advanced Cmos Systems for Low Voltage Applications

N Agrawal - 2015 - etda.libraries.psu.edu
One of the key challenges in scaling beyond 10nm technology node is device-to-device
variation. Variation in device performance, mainly threshold voltage (VT) inhibits supply …