Eye modulation for pulse-amplitude modulation communication systems

H Cirit, KS Gopalakrishnan - US Patent 9,559,880, 2017 - Google Patents
The present invention is directed to communication systems. More specifically, embodiments
of the present invention provide a technique and system thereof for performing eye …

Operation of a multi-slice processor with an expanded merge fetching queue

KM Fernsler, DA Hrusecky, HQ Le… - US Patent …, 2018 - Google Patents
Operation of a multi-slice processor that includes a plurality of execution slices and a
plurality of load/store slices, where each load/store slice includes a load miss queue and a …

Bypassing equalization at lower data rates

DD Sharma - US Patent 10,880,137, 2020 - Google Patents
A port of a computing device is to connect to another device over a link and use equalization
logic to perform equaliza tion of the link at a plurality of different data rates. The equalization …

Operation of a multi-slice processor with dynamic canceling of partial loads

EA McGlone, JL Molnar - US Patent 10,346,174, 2019 - Google Patents
Operation of a multi-slice processor that includes a plurality of execution slices and a
plurality of load/store slices, where the multi-slice processor is configured to dynamically …

Equalization coefficient search algorithm

M Hopgood, R Huang, V Mehta, H Dutt - US Patent 9,886,402, 2018 - Google Patents
A method comprises selecting a starting point on a map of equalization coefficients and
measuring an eye height of a signal transmitted using the set of equalization coefficients …

Operation of a multi-slice processor implementing simultaneous two-target loads and stores

RA Cordes, DA Hrusecky, JL Molnar… - US Patent …, 2018 - Google Patents
Operation of a multi-slice processor that includes a plurality of execution slices and a
load/store superslice, where the load/store superslice includes a set predict array, a first …

Operation of a multi-slice processor preventing early dependent instruction wakeup

S Chadha, DA Hrusecky, EA McGlone… - US Patent …, 2018 - Google Patents
Operation of a multi-slice processor that includes a plurality of execution slices, a plurality of
load/store slices, and an instruction sequencing unit, where operation includes: receiving, at …

High data rate multilevel clock recovery system

MB Baecher, TJ Beukema, L Msalka - US Patent 9,584,345, 2017 - Google Patents
Digital receiver systems and clock recovery techniques for use in digital receiver systems
are provided to implement asynchronous baud-rate clock recovery systems for high data …

Flush avoidance in a load store unit

S Chadha, DA Hrusecky, EA McGlone… - US Patent …, 2019 - Google Patents
Flush avoidance in a load store unit including launching a load instruction targeting an
effective address; encountering a set predict hit and an effective-to-real address translator …

Operation of a multi-slice processor implementing simultaneous two-target loads and stores

RA Cordes, DA Hrusecky, JL Molnar… - US Patent …, 2018 - Google Patents
Operation of a multi-slice processor that includes a plurality of execution slices and a
load/store superslice, where the load/store superslice includes a set predict array, a first …