The advance of semiconductor technology not only enables integrated circuits with higher
density and better performance but also increases their vulnerability to various aging …

This paper presents a high-performance and energy efficient processor exploiting a Mag
netoresistive-based C omputing-i nM emory array architecture (so-called MagCiM …

Under process, voltage, and temperature variations, SRAM cell stability largely fluctuates
from the nominal value. In the design step, SRAM cell optimization while ignoring the …

Abstract The Complementary FET (CFET) architecture offers a more promising solution for
achieving higher transistor density in sub-3 nm technology nodes. In this study, we use 3D …

With increasing system complexity, security, stringent runtime requirements for functional
safety, and cost constraints of a mass market, the reliable and secure operation of …

This article describes a comprehensive framework for analysis of time-dependent
performance-reliability degradation of an SRAM cache, considering cache configurations …

We present a successful methodology for accurately predicting failure distributions of SRAM
arrays based on simulation results of a single bit cell. This was achieved by using extreme …

VLSI-based programmable devices support improved software-based reconfigurability and
hardware performance, which are adopted as developing platforms to implement complex …

To accurately determine the reliability of SRAMs, we propose a method to estimate the
wearout parameters of FEOL TDDB using on-line data collected during operations. Errors in …

Static random access memory (SRAM) is a high-speed memory, which will produce
performance degradation with the increase of use time, and the current research mostly …