New curvature-compensation technique for CMOS bandgap reference with sub-1-V operation

MD Ker, JS Chen - IEEE Transactions on circuits and systems II …, 2006 - ieeexplore.ieee.org
A new sub-1-V curvature-compensated CMOS bandgap reference, which utilizes the
temperature-dependent currents generated from the parasitic npn and pnp bipolar junction …

A 1.6-V 25-A 5-ppm/C Curvature-Compensated Bandgap Reference

ZK Zhou, Y Shi, Z Huang, PS Zhu… - … on Circuits and …, 2011 - ieeexplore.ieee.org
A high precision high-order curvature-compensated bandgap reference (BGR) compatible
with standard BiCMOS process is presented in this paper that is capable of working down to …

A low dropout, CMOS regulator with high PSR over wideband frequencies

V Gupta, GA Rincón-Mora - 2005 IEEE International …, 2005 - ieeexplore.ieee.org
Modern system-on-chip (SoC) environments are swamped in high frequency noise that is
generated by RF and digital circuits and propagated onto supply rails through capacitive …

An all-MOSFET voltage reference with− 50-dB PSR at 80 MHz for low-power SoC design

N Alhassan, Z Zhou… - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
This brief presents a voltage reference (VR) for modern low-power system-on-chip
applications, in which a high-frequency supply ripple can degrade system performance. With …

A low power CMOS bandgap voltage reference with enhanced power supply rejection

W Li, R Yao, L Guo - 2009 IEEE 8th International Conference …, 2009 - ieeexplore.ieee.org
A low power low temperature-coefficient bandgap voltage reference features high power
supply rejection (PSR) for low dropout regulators (LDOs) is presented in this paper. An …

Analysis and design techniques for supply-noise mitigation in phase-locked loops

A Arakali, S Gondi, PK Hanumolu - IEEE Transactions on …, 2010 - ieeexplore.ieee.org
Supply noise affects the jitter performance of ring oscillator-based phase-locked loops
(PLLs) significantly. While the focus of much of the prior art is on supply noise in oscillators …

A sub 1 V high PSRR CMOS bandgap voltage reference

M Chahardori, M Atarodi, M Sharifkhani - Microelectronics Journal, 2011 - Elsevier
A Bandgap circuit capable of generating a reference voltage of less than 1V with high PSRR
and low temperature sensitivity is proposed. High PSRR achieved by means of an improved …

Autonomous SoC for neural local field potential recording in mm-scale wireless implants

LB Leene, M Maslik, P Feng… - … on Circuits and …, 2018 - ieeexplore.ieee.org
Next generation brain machine interfaces fundamentally need to improve the information
transfer rate and chronic consistency when observing neural activity over a long period of …

Predicting and designing for the impact of process variations and mismatch on the trim range and yield of bandgap references

V Gupta, GA Rincón-Mora - Sixth international symposium on …, 2005 - ieeexplore.ieee.org
Process tolerance and device mismatch produce significant random variations in bandgap
voltage reference circuits. These variations lead to errors in the reference voltage and …

A 0.7 V, 2.7 μW, 12.9 ppm/° C over 180° C CMOS subthreshold voltage reference

CM Andreou, J Georgiou - International journal of circuit theory …, 2017 - Wiley Online Library
An all‐CMOS, low‐power, wide‐temperature‐range, curvature‐compensated voltage
reference is presented. The proposed topology achieves a measured temperature …