Finding the optimal unroll-and-jam
N Zingirian, M Maresca - … 7th International Conference, HPCN Europe 1999 …, 1999 - Springer
Reducing the traffic between CPU and main memory is one of the main issues in the
optimization of programs for load/store architectures. It is the register allocation module of …
optimization of programs for load/store architectures. It is the register allocation module of …
Loop regularization for image and video processing on instruction level parallel architectures
N Zingirian, M Maresca - Proceedings Fifth IEEE International …, 2000 - ieeexplore.ieee.org
This paper presents a novel loop transformation (Loop Regularization, LR) that increases
the execution efficiency of image and video processing programs running on instruction …
the execution efficiency of image and video processing programs running on instruction …
Design automation methodologies for extensible processor platform
N Cheung - 2005 - unsworks.unsw.edu.au
This thesis addresses two ubiquitous trends in the embedded system world-the increasing
importance of design turnaround time as a design metric, and the move towards closing the …
importance of design turnaround time as a design metric, and the move towards closing the …