FPnew: An open-source multiformat floating-point unit architecture for energy-proportional transprecision computing

S Mach, F Schuiki, F Zaruba… - IEEE Transactions on Very …, 2020 - ieeexplore.ieee.org
The slowdown of Moore's law and the power wall necessitates a shift toward finely tunable
precision (aka transprecision) computing to reduce energy footprint. Hence, we need circuits …

A template-based framework for exploring coarse-grained reconfigurable architectures

A Podobas, K Sano, S Matsuoka - 2020 IEEE 31st International …, 2020 - ieeexplore.ieee.org
Coarse-Grained Reconfigurable Architectures (CGRAs) are being considered as a
complementary addition to modern High-Performance Computing (HPC) systems. These …

A configurable floating-point multiple-precision processing element for HPC and AI converged computing

W Mao, K Li, Q Cheng, L Dai, B Li, X Xie… - … Transactions on Very …, 2021 - ieeexplore.ieee.org
There is an emerging need to design configurable accelerators for the high-performance
computing (HPC) and artificial intelligence (AI) applications in different precisions. Thus, the …

A vector systolic accelerator for multi-precision floating-point high-performance computing

K Li, W Mao, J Zhou, B Li, Z Yang… - … on Circuits and …, 2022 - ieeexplore.ieee.org
There is an emerging need to design multi-precision floating-point (FP) accelerators for high-
performance-computing (HPC) applications. The commonly-used methods are based on …

Double-precision fpus in high-performance computing: an embarrassment of riches?

J Domke, K Matsumura, M Wahib… - 2019 IEEE …, 2019 - ieeexplore.ieee.org
Among the (uncontended) common wisdom in High-Performance Computing (HPC) is the
applications' need for large amount of double-precision support in hardware. Hardware …

FAUST: design and implementation of a pipelined RISC-V vector floating-point unit

M Kovač, L Dragić, B Malnar, F Minervini… - Microprocessors and …, 2023 - Elsevier
In this paper, we present Faust, a pipelined FPU for vector processing-capable RISC-V core
developed within the European Processor Initiative (EPI) project. Faust is based on the open …

A Low-Cost Floating-Point Dot-Product-Dual-Accumulate Architecture for HPC-Enabled AI

H Tan, L Huang, Z Zheng, H Guo… - … on Computer-Aided …, 2023 - ieeexplore.ieee.org
The dot-product is one of the most frequently used operations for a wide variety of high-
performance computing (HPC) and artificial intelligence (AI) applications. However, for large …

[PDF][PDF] Floating-point architectures for energy-efficient transprecision computing

S Mach - 2021 - research-collection.ethz.ch
An era of exponentially improving computing efficiency is coming to an end as Moore's law
falters and Dennard scaling seems to have broken down. The power-wall obstacle fuels a …

Minimizing convex quadratics with variable precision conjugate gradients

S Gratton, E Simon, D Titley‐Peloquin… - … Linear Algebra with …, 2021 - Wiley Online Library
We investigate the method of conjugate gradients, exploiting inaccurate matrix‐vector
products, for the solution of convex quadratic optimization problems. Theoretical …

A Reconfigurable Processing Element for Multiple-Precision Floating/Fixed-Point HPC

B Li, K Li, J Zhou, Y Ren, W Mao, H Yu… - IEEE Transactions on …, 2023 - ieeexplore.ieee.org
High-performance computing (HPC) can facilitate deep neural network (DNN) training and
inference. Previous works have proposed multiple-precision floating-and fixed-point …