Circuitry and methods for programming resistive random access memory devices
JL McCollum - US Patent 10,522,224, 2019 - Google Patents
(57) ABSTRACT A method for programming a RelAM cell including a ReRAM device
connected in series with an access transistor includes biasing the ReRAM cell with a …
connected in series with an access transistor includes biasing the ReRAM cell with a …
Dynamically controlling voltage for access operations to magneto-resistive random access memory (MRAM) bit cells to account for process variations
Dynamically controlling voltage for access (ie, read and/or write) operations to magneto-
resistive random access memory (MRAM) bit cells to account for process variations is …
resistive random access memory (MRAM) bit cells to account for process variations is …
Sense amplifier
CW Wang, LAI Shu-Lin, YT Chiu - US Patent 10,181,358, 2019 - Google Patents
A sense amplifier for reading a via Read-Only Memory (Via-ROM) is provided. The sense
amplifier includes a read circuit, an adaptive keeper circuit and a leakage monitor circuit …
amplifier includes a read circuit, an adaptive keeper circuit and a leakage monitor circuit …
Front to back resistive random-access memory cells
J Greene, F Hawley, J McCollum - US Patent 10,855,286, 2020 - Google Patents
A resistive random-access memory device formed on a semiconductor substrate includes a
first interlayer dielectric formed over the semiconductor substrate and includes a first via. A …
first interlayer dielectric formed over the semiconductor substrate and includes a first via. A …
Sense amplifier
CW Wang, LAI Shu-Lin, YT Chiu - US Patent 10,770,161, 2020 - Google Patents
A sense amplifier for reading a via Read-Only Memory (Via-ROM) is provided. The sense
amplifier includes a read circuit, an adaptive keeper circuit and a leakage monitor circuit …
amplifier includes a read circuit, an adaptive keeper circuit and a leakage monitor circuit …
Single ended memory device
K Hsu - US Patent 9,947,389, 2018 - Google Patents
A memory device includes a memory cell that is configured to store a data bit, comprising at
least one read transistor that is configured to form either a discharging path or a leakage …
least one read transistor that is configured to form either a discharging path or a leakage …
Low-leakage sense circuit, memory circuit incorporating the low-leakage sense circuit, and method
V Raj, SG Dharne, UK Saha, M Rashed - US Patent 11,495,288, 2022 - Google Patents
A disclosed sense circuit for a memory circuit includes sense amplifiers that detect
differences in voltage levels on complementary bitlines during read operations. Instead of …
differences in voltage levels on complementary bitlines during read operations. Instead of …
Non-volatile memory with a well bias generation circuit
K Ramanan, JS Choy, JT Williams - US Patent 11,145,382, 2021 - Google Patents
A leakage measuring circuit includes a bias input node control circuit and provides a signal
indicative of a leakage current through the bias input node. The bias input node control …
indicative of a leakage current through the bias input node. The bias input node control …
Variable resistive memory device and method of driving a variable resistive memory device
KW Lee, SM Hong, TH Kim, HD Lee - US Patent 11,482,283, 2022 - Google Patents
A variable resistive memory device includes a memory cell, a first circuit, and a second
circuit. The memory cell is connected between a word line and a bit line. The first circuit …
circuit. The memory cell is connected between a word line and a bit line. The first circuit …
Circuitry and methods for programming resistive random access memory devices
JL McCollum - US Patent 10,650,890, 2020 - Google Patents
A method for programming a ReRAM cell including a ReRAM device connected in series
with an access transistor includes biasing the ReRAM cell with a programming potential that …
with an access transistor includes biasing the ReRAM cell with a programming potential that …