CHERI extends a conventional RISC Instruction-Set Architecture, compiler, and operating
system to support fine-grained, capability-based memory protection to mitigate memory …

Control flow integrity (CFI) has been proposed as an approach to defend against control-
hijacking memory corruption attacks. CFI works by assigning tags to indirect branch targets …

Software security defenses are routinely broken by the persistence of both security
researchers and attackers. Hardware solutions based on tagging are emerging as a …

Persistent memory invites applications to manipulate persistent data via load and store
instructions. Because failures during updates may destroy transient data (eg, in CPU …

Memory-safety violations are the primary cause of security and reliability issues in software
systems written in unsafe languages. Given the limited adoption of decades-long research in …

Shielded execution based on Intel SGX provides strong security guarantees for legacy
applications running on untrusted platforms. However, memory safety attacks such as …

C remains central to our computing infrastructure. It is notionally defined by ISO standards,
but in reality the properties of C assumed by systems code and those implemented by …

The CHERI architecture allows pointers to be implemented as capabilities (rather than
integer virtual addresses) in a manner that is compatible with, and strengthens, the …

This technical report describes CHERI ISAv7, the seventh version of the Capability
Hardware Enhanced RISC Instructions (CHERI) Instruction-Set Architecture (ISA) being …

Good programming languages provide helpful abstractions for writing secure code, but the
security properties of the source language are generally not preserved when compiling a …