A low-power comparator is presented. pMOS transistors are used at the input of the
preamplifier of the comparator as well as the latch stage. Both stages are controlled by a …

In this paper, a low-power method for double-tail comparators is introduced. Using the
proposed method, the power consumption of the pre-amplifier which is the dominant part is …

A low‐power technique for high‐resolution comparators is introduced. In this technique, p‐
type metal‐oxide‐semiconductor field‐effect transistors are employed as the input of the …

A charge sharing technique for high-speed double-tail comparators is presented. This
technique is applied to the pre-amplifier stage of the dynamic comparators so that the …

This paper presents an energy‐efficient 12‐bit successive approximation‐register A/D
converter (ADC). The D/A converter (DAC) plays a crucial role in ADC linearity, which can be …

A novel structure of Capacitive Digital to Analog Converters (CDAC) for Successive
Approximation Register Analog to Digital Converters (SAR ADC) is presented. In this CDAC …

A low-power high-speed two-stage dynamic comparator is presented. The voltage
fluctuation at the first stage of the comparator (pre-amplifier stage) is limited to Vdd/2 …

A highly energy-efficiency switching procedure for the capacitor-splitting digital-to-analog
converter (DAC) is presented for successive approximation register (SAR) analogue-to …

A new sampling scheme for successive approximation register (SAR) analog-to-digital
converters (ADCs) is proposed in this paper. The switching scheme eliminates two major …

Comparators play the role of brain in any conversion system as the precision of any Analog
to digital converter solely depends upon the performance metrics of comparator Thus it is …