The test sequence compaction problem is modelled here, as a set covering problem. This
formulation enables the straightforward application of set covering methods for compaction …

A Hybrid Control System (HCS) model has to implement the reaction to discrete events that
occur in a controlled plant and as well as to control the continuous time parts according to …

This paper introduces co-processor synthesis-a methodology that provides design benefits
by implementing hardware co-processors directly from embedded software. The paper …

The problem of compacting a set of test sequences for sequential circuits is modeled here
with the help of a covering matrix, where the test sequences are modeled as columns with …

A method for the reduction of power dissipation during testing of sequential circuits is
presented. In this algorithm from an initial set of test sequences a set of subsequences is …

In this paper a GA-based method that compacts Test Sequences for sequential circuits is
presented. In this algorithm from an initial set of test sequences a subset of sequences is …

This paper deals with two problems arising during the testing of sequential VLSI circuits,
namely the test sequence compaction problem and the power minimization problem. Here is …

This paper presents a, common, unified approach to solve either the test sequence
compaction problem or the power minimization problem during circuit testing. This approach …

A method for minimizing power dissipation in CMOS sequential circuits during test
application is presented. Initially, the set of test sequences with the transition counts …