High performance network virtualization with SR-IOV

Y Dong, X Yang, J Li, G Liao, K Tian, H Guan - Journal of Parallel and …, 2012 - Elsevier
Virtualization poses new challenges to I/O performance. The single-root I/O virtualization
(SR-IOV) standard allows an I/O device to be shared by multiple Virtual Machines (VMs) …

Re-evaluating network onload vs. offload for the many-core era

MGF Dosanjh, RE Grant, PG Bridges… - … on Cluster Computing, 2015 - ieeexplore.ieee.org
This paper explores the trade-offs between on-loaded versus offloaded network stack
processing for systems with varying CPU frequencies. This study explores the differences of …

Composable thermal modeling and simulation for architecture-level thermal designs of multicore microprocessors

H Wang, SXD Tan, D Li, A Gupta, Y Yuan - ACM Transactions on Design …, 2013 - dl.acm.org
Efficient temperature estimation is vital for designing thermally efficient, lower power and
robust integrated circuits in nanometer regime. Thermal simulation based on the detailed …

[PDF][PDF] IoT-Based Biometric Attendance System Using Arduino and ThingsBoard

PA Raihan, R Tullah, MR Julianti, S Ramdhan… - International Journal of …, 2023 - core.ac.uk
The fingerprint sensor is a sensor that detects fingerprints using an optical system, where
detection is done by reading the contours of the fingerprints and the static electricity of the …

Runtime power estimator calibration for high-performance microprocessors

H Wang, SXD Tan, XX Liu… - 2012 Design, Automation & …, 2012 - ieeexplore.ieee.org
Accurate runtime power estimation is important for on-line thermal/power regulation on
today's high performance processors. In this paper, we introduce a power calibration …

Fault-oriented software robustness assessment for multicast protocols

S Xiao, S Li, X Wang, L Deng - Second IEEE International …, 2003 - ieeexplore.ieee.org
This paper reports a systematic approach for detecting software defects in multicast protocol
implementations. We deploy a fault-oriented methodology and an integrated test system …

Rx stack accelerator for 10 GbE integrated NIC

F Abel, C Hagleitner… - 2012 IEEE 20th Annual …, 2012 - ieeexplore.ieee.org
The miniaturization of CMOS technology has reached a scale at which server processors
are starting to integrate multi-gigabit network interface controllers (NIC). While transistors are …

Designing a tiny and customizable TCP/IP core for low cost FPGA

L Charaabi, I Jaziri - 2017 International Conference on …, 2017 - ieeexplore.ieee.org
The aim of this project is to develop a tiny and flexible hardware TCP/IP module. The module
is so autonomous and so lightweight that can fits in low cost FPGA. In this project, the …

[PDF][PDF] Making efficient logging a common practice in software development.

OM Khaled, HM Hosny - aiccsa, 2005 - researchgate.net
This paper proposes a new approach for making logging an efficient mechanism within the
software development lifecycle from the design to the maintenance phase. Our approach …

[图书][B] Compact modeling and analysis for electronic and thermal effects of nanometer integrated and packaged systems

H Wang - 2012 - search.proquest.com
Abstract Design and verification of today's nanometer very-large-scale integrated (VLSI)
system remain a very challenging problem. For instance, the sub-90-nm technology has …