A survey on pipelined FFT hardware architectures

M Garrido - Journal of Signal Processing Systems, 2022 - Springer
The field of pipelined FFT hardware architectures has been studied during the last 50 years.
This paper is a survey that includes the main advances in the field related to architectures for …

Correct and Compositional Hardware Generators

R Nigam, E Gabizon, E Lam, A Sampson - arXiv preprint arXiv:2401.02570, 2024 - arxiv.org
Hardware generators help designers explore families of concrete designs and their
efficiency trade-offs. Both parameterized hardware description languages (HDLs) and …

Using rotator transformations to simplify FFT hardware architectures

R Andersson, M Garrido - … transactions on circuits and systems I …, 2020 - ieeexplore.ieee.org
In this paper, we present a new approach to simplify fast Fourier transform (FFT) hardware
architectures. The new approach is based on a group of transformations called decimation …

Radar Signal Processing Architecture for Early Detection of Automotive Obstacles

N Petrović, M Petrović, V Milovanović - Electronics, 2023 - mdpi.com
With the mass adoption of automotive vehicles, road accidents have become a common
occurrence. One solution to this problem is to employ safety systems that can provide early …

Parameterizable Design on Convolutional Neural Networks Using Chisel Hardware Construction Language

MC Madineni, M Vega, X Yang - Micromachines, 2023 - mdpi.com
This paper presents a parameterizable design generator on convolutional neural networks
(CNNs) using the Chisel hardware construction language (HCL). By parameterizing …

A survey on system-on-a-chip design using chisel hw construction language

M Käyrä, TD Hämäläinen - IECON 2021–47th Annual …, 2021 - ieeexplore.ieee.org
This paper presents a survey of functional programming languages in System-on-a-Chip
(SoC) design. The motivation is improving the design productivity by better source code …

Hardware Generators with Chisel

M Schoeberl, HJ Damsgaard… - 2024 27th Euromicro …, 2024 - ieeexplore.ieee.org
Most digital hardware is described in hardware description languages, such as VHDL and
(System) Verilog. These languages provide limited programming models for hardware …

An Automatic Generator of Non-Power-of-Two SDF FFT Architectures for 5G and Beyond

VM Bautista, M Garrido - 2023 38th Conference on Design of …, 2023 - ieeexplore.ieee.org
This paper presents an automatic generator for non-power-of-two (NP2) single-path delay
feedback (SDF) fast Fourier transform (FFT) architectures. Previous generators support sizes …

Hardware–Software Co-Design of an Audio Feature Extraction Pipeline for Machine Learning Applications

J Vreča, R Pilipović, A Biasizzo - Electronics, 2024 - mdpi.com
Keyword spotting is an important part of modern speech recognition pipelines. Typical
contemporary keyword-spotting systems are based on Mel-Frequency Cepstral Coefficient …

On Hardware Implementations of Two-Dimensional Fast Fourier Transform for Radar Signal Processing

VD Damnjanović, ML Petrović… - IEEE EUROCON 2023 …, 2023 - ieeexplore.ieee.org
In the automotive industry, 77/79 GHz frequency-modulated continuous-wave (FMCW)
radars have been vastly used for different driver-assistance and safety applications in …