New insights into single event transient propagation in chains of inverters—Evidence for propagation-induced pulse broadening

V Ferlet-Cavrois, P Paillet, D McMorrow… - … on Nuclear Science, 2007 - ieeexplore.ieee.org
The generation and propagation of single event transients (SET) is measured and modeled
in SOI inverter chains with different designs. SET propagation in inverter chains induces …

Ionizing Radiation Effectsin Electronics

M Bagatin, S Gerardin - 2016 - api.taylorfrancis.com
There is an invisible enemy that constantly threatens the operation of electronics: ionizing
radiation. From sea level to outer space, ionizing radiation is virtually everywhere. At sea …

Investigation of the propagation induced pulse broadening (PIPB) effect on single event transients in SOI and bulk inverter chains

V Ferlet-Cavrois, V Pouget, D McMorrow… - … on Nuclear Science, 2008 - ieeexplore.ieee.org
The propagation of single event transients (SET) is measured and modeled in SOI and bulk
inverter chains. The propagation-induced pulse broadening (PIPB) effect is shown to …

Digital design techniques for dependable high performance computing

S Azimi, L Sterpone - 2020 IEEE International Test Conference …, 2020 - ieeexplore.ieee.org
As today's process technologies continuously scale down, circuits become increasingly
more vulnerable to radiation-induced soft errors in nanoscale VLSI technologies. The …

Analysis of soft error rates in combinational and sequential logic and implications of hardening for advanced technologies

NN Mahatme, I Chatterjee, BL Bhuva… - 2010 IEEE …, 2010 - ieeexplore.ieee.org
Previous results and models have predicted that combinational logic errors would dominate
over flip-flop errors for the past few technology nodes. However, recent experimental results …

C-CREST technique for combinational logic SET testing

JR Ahlbin, JD Black, LW Massengill… - … on Nuclear Science, 2008 - ieeexplore.ieee.org
SEUs due to combinational logic in 90 nm CMOS is analyzed at various speeds using a new
design approach called the combinational circuit for radiation effects self-test (C-CREST). C …

Reconciling fault-tolerant distributed computing and systems-on-chip

M Függer, U Schmid - Distributed Computing, 2012 - Springer
Classic distributed computing abstractions do not match well the reality of digital logic gates,
which are the elementary building blocks of Systems-on-Chip (SoCs) and other Very Large …

[HTML][HTML] Rigorously modeling self-stabilizing fault-tolerant circuits: An ultra-robust clocking scheme for systems-on-chip

D Dolev, M Függer, M Posch, U Schmid… - Journal of Computer and …, 2014 - Elsevier
We present the first implementation of a distributed clock generation scheme for Systems-on-
Chip that recovers from an unbounded number of arbitrary transient faults despite a large …

Statistics and methodology of multiple cell upset characterization under heavy ion irradiation

GI Zebrev, MS Gorbunov, RG Useinov… - Nuclear Instruments and …, 2015 - Elsevier
Mean and partial cross-section concepts and their connections to multiplicity and statistics of
multiple cell upsets (MCUs) in highly-scaled digital memories are introduced and discussed …

Radiation-induced soft errors: A chip-level modeling perspective

N Seifert - Foundations and Trends® in Electronic Design …, 2010 - nowpublishers.com
Chip-level soft-error rate (SER) estimation can come from two sources: direct experimental
measurement and simulation. Because SER mitigation decisions need to be made very …