Evaluating STT-RAM as an energy-efficient main memory alternative

E Kültürsay, M Kandemir… - … Analysis of Systems …, 2013 - ieeexplore.ieee.org
In this paper, we explore the possibility of using STT-RAM technology to completely replace
DRAM in main memory. Our goal is to make STT-RAM performance comparable to DRAM …

Improving NAND flash based disk caches

T Kgil, D Roberts, T Mudge - ACM SIGARCH Computer Architecture …, 2008 - dl.acm.org
Flash is a widely used storage device that provides high density and low power, appealing
properties for general purpose computing. Today, its usual application is in portable special …

An efficient B-tree layer implementation for flash-memory storage systems

CH Wu, TW Kuo, LP Chang - ACM Transactions on Embedded …, 2007 - dl.acm.org
With the significant growth of the markets for consumer electronics and various embedded
systems, flash memory is now an economic solution for storage systems design. Because …

FlashCache: a NAND flash memory file cache for low power web servers

T Kgil, T Mudge - Proceedings of the 2006 international conference on …, 2006 - dl.acm.org
We propose an architecture that uses NAND flash memory to reduce main memory power in
web server platforms. Our architecture uses a two level file buffer cache composed of a …

Reducing write activities on non-volatile memories in embedded CMPs via data migration and recomputation

J Hu, CJ Xue, WC Tseng, Y He, M Qiu… - Proceedings of the 47th …, 2010 - dl.acm.org
Recent advances in circuit and process technologies have pushed non-volatile memory
technologies into a new era. These technologies exhibit appealing properties such as low …

Energy-aware demand paging on NAND flash-based embedded storages

C Park, JU Kang, SY Park, JS Kim - Proceedings of the 2004 …, 2004 - dl.acm.org
The ever-increasing requirement for high-performance and huge-capacity memories of
emerging embedded applications has led to the widespread adoption of SDRAM and NAND …

Bad block management for flash memory

JA Bivens, MM Franceschini, A Jagmohan - US Patent 8,560,922, 2013 - Google Patents
Bad block management for flash memory including a method for storing data. The method
includes receiving a write request that includes write data. A block of memory is identified for …

Compiler-assisted demand paging for embedded systems with flash memory

C Park, J Lim, K Kwon, J Lee, SL Min - Proceedings of the 4th ACM …, 2004 - dl.acm.org
In this paper, we propose a novel, application specific demand paging mechanism for low-
end embedded systems with flash memory as secondary storage. These systems are not …

Write activity reduction on non-volatile main memories for embedded chip multiprocessors

J Hu, CJ Xue, Q Zhuge, WC Tseng… - ACM Transactions on …, 2013 - dl.acm.org
Recent advances in circuit and semiconductor technologies have pushed Non-Volatile
Memory (NVM) technologies into a new era. These technologies exhibit appealing …

A system architecture, processor, and communication protocol for secure implants

C Strydis, RM Seepers, P Peris-Lopez… - ACM Transactions on …, 2013 - dl.acm.org
Secure and energy-efficient communication between Implantable Medical Devices (IMDs)
and authorized external users is attracting increasing attention these days. However, there …