Damascene Cu electroplating for on-chip metallization, which we conceived and developed
in the early 1990s, has been central to IBM's Cu chip interconnection technology. We review …

Integrated circuit chips and chip packages are disclosed that include an over-passivation
scheme at a top of the integrated circuit chip and a bottom scheme at a bottom of the …

(57) ABSTRACT A method of closely interconnecting integrated circuits con tained within a
semiconductor wafer to electrical circuits Surrounding the semiconductor wafer. Electrical …

The development of electronics that can operate at high temperatures has been identified as
a critical technology for the next century. Increasingly, engineers will be called upon to …

H01L25/16—Assemblies consisting of a plurality of individual semiconductor or other solid
state devices; Multistep manufacturing processes thereof the devices being of types …

An image or light sensor chip package includes an image or light sensor chip having a non-
photosensitive area and a pho tosensitive area Surrounded by the non-photosensitive area …

H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid
state devices; Multistep manufacturing processes thereof all the devices being of a type …

US8836146B2 - Chip package and method for fabricating the same - Google Patents
US8836146B2 - Chip package and method for fabricating the same - Google Patents Chip …

We examine electrical performance issues associated with advanced VLSI semiconductor
on-chip interconnections or “interconnects.” Performance can be affected by wiring …

Spiral inductors and different types of transmission lines are fabricated by using copper (Cu)-
damascene interconnects and high-resistivity silicon (HRS) or sapphire substrates. The …