Extended finite state machines (EFSMs) can be efficiently adopted to model the functionality
of complex designs without incurring the state explosion problem typical of the more …

In this paper, we present a hybrid method for deciding problems involving integer and
Boolean variables which is based on generic SAT solving techniques augmented with a) a …

The paper describes a high-level pseudodeterministic ATPG that explores the DUT state
space by exploiting an easy-to-traverse extended FSM model. Testing of hard-to-detect …

The paper describes a functional ATPG that explores the DUT state space by exploiting an
easy-to-traverse extended FSM model. The ATPG engine relies on learning, backjumping …

In this paper we present a new progressive cooperating simplifier for deciding the
satisfiability of a quantifier-free formula in the first-order theory of integers involving …

A functional automatic test pattern generator (ATPG) that explores the design under test
(DUT) state space by exploiting an easy-to-traverse extended finite state machine (FSM) …

Increasing size and complexity of digital designs has made essential to address critical
verification issues at the early stages of design cycle. Therefore, automated verification tools …

This paper presents an efficient strategy to solve the satisfiability (SAT) problem for RTL
designs. Boolean DPLL algorithm is extended into a unified procedure to solve the hybrid …

Physical design is a crucial stage determining the ultimate performance of very‐large‐scale
integration design in which the constraint application plays an important role. Unfortunately …

The complexity of designs continues to rise, driven by technology advances, while time-
tomarket imposes always shorter time. Moreover, the increasing of design complexity …