The Vedic multiplier has a very fastest arithmetic operation and less complex than a
multiplier. The Vedic multiplier is used to simplify the multiplication process and delay. If the …

A multiplier is one of the key hardware blocks in most of the processors. Multiplication is a
lengthy, time‐consuming task. Vedic multiplication in field programmable gate array …

Multipliers in a digital processor remains as a core of mathematical computing paradigm. In
ancient times Vedic mathematicians developed basic multiplication algorithms. This study …

This paper explores low-power and energy-efficient multi-bit Vedic Multiplier (VM)
architectures at a supply voltage as low as 0.6 V. Energy efficient architectures are a …

Abstract Digital Signal Processing (DSP) is a very significant and active research area. High
throughput is a requirement for most wireless communication systems. The critical …

In this paper, the Binary coded decimal floating-point multiplier (BCD-FPM) and Binary
floating-point multiplier (BFPM) with binary to BCD (B2BCD) converter are proposed using …

In this paper, FIR filter of 45nm technological node has been presented, which is a basic
filter in DSP applications. Hybrid Adder has been introduced to improve cost and power …

Vedic mathematics is a system of ancient Indian mathematics, which has a unique technique
of solutions based on only 16 sutras or formulae. This technique is very useful for performing …

Multiplier is an essential functional block of a microprocessor because multiplication is
needed to be performed repeatedly in almost all scientific calculations. Therefore, design of …

Vedic mathematics is an old mathematics which is more effective than other mathematic
procedures. Vedic maths is utilized as a part of numerous applications, for example …