MA Akbar, JA Lee - Microelectronics Reliability, 2014 - Elsevier
In this paper we propose an area-efficient self-repairing adder that can repair multiple faults and identify the particular faulty full adder. Fault detection and recovery has been carried out …
The widespread use of sensitive and constrained applications necessitates lightweight (low- power and low-area) algorithms developed for constrained nano-devices. However, nearly …
P Kumar, RK Sharma - … science and technology, an international journal, 2016 - Elsevier
In the complex computing system, processing units are dealing with devices of smaller size, which are sensitive to the transient faults. A transient fault occurs in a circuit caused by the …
Arithmetic circuits, especially the adder, are the heart of any computing system that comprises numerous processing units ranging from small digital systems to supercomputers …
Abstract Field Programmable Gate Arrays are extensively used in space, military, and commercial sectors due to their reprogrammable nature. In high-safety environments …
With the increasing complexity of system-on-chip designs, the probability of having soft- errors is increasing sharply. Since, adder is one of the essential elements present in almost …
MM Kermani, V Singh… - IEEE Transactions on …, 2016 - ieeexplore.ieee.org
The Viterbi algorithm is commonly applied to a number of sensitive usage models including decoding convolutional codes used in communications such as satellite communication …
Effective self-repairing can be achieved if the fault along with its exact location can be determined. In this paper, a self-repairing hybrid adder is proposed with fault localization. It …
M Nam, Y Choi, K Cho - Microelectronics Journal, 2018 - Elsevier
This paper presents a high-speed, energy efficient carry select adder (CSLA) dominated by carry generation logics. The proposed architecture is composed of three functional stages–a …