The latched comparator is a building block of virtually all analog-to-digital converter
architectures. It uses a positive feedback mechanism to regenerate the analog input signal …

Digital calibration using adaptive signal processing corrects for offset mismatch, gain
mismatch, and sample-time error between time-interleaved channels in a 10-b 120 …

The latched comparator is utilized in virtually all analog-to-digital converter architectures. It
uses a positive feedback mechanism to regenerate the analog input signal into a full-scale …

A low-power 10-bit converter that can sample input frequencies above 100 MHz is
presented. The converter consumes 55 mW when sampling at f/sub s/= 40 MHz from a 3-V …

Over the years, the fundamentals of VLSI technology have evolved to include a wide range
of topics and a broad range of practices. To encompass such a vast amount of knowledge …

The interest for: I:~ modulation-based NO converters has significantly increased in the last
years. The reason for that is twofold. On the one hand, unlike other converters that need …

A 10-bit 40-Msample/s two-channel parallel pipelined ADC with monolithic digital
background calibration has been designed and fabricated in a 1/spl mu/m CMOS …

A distributed-gain preamplifier uses averaging to improve resolution by 4 b in differential
nonlinearity (DNL) and 2 b in integral nonlinearity (INL) in a flash analog-to-digital converter …

A parallel-pipelined A/D converter with an area and power efficient architecture is described.
By sharing amplifiers along the pipeline and also completely eliminating the amplifier from …

Analog background calibration using adaptive signal processing, an extra channel, and
mixed signal integrators matches the offsets and gains of time-interleaved channels in a 10 …