Reducing peak power with a table-driven adaptive processor core

V Kontorinis, A Shayan, DM Tullsen… - Proceedings of the 42nd …, 2009 - dl.acm.org
The increasing power dissipation of current processors and processor cores constrains
design options, increases packaging and cooling costs, increases power delivery costs, and …

Optimal design of the power-delivery network for multiple voltage-island system-on-chips

B Amelifard, M Pedram - IEEE Transactions on Computer-Aided …, 2009 - ieeexplore.ieee.org
This paper introduces techniques for power-efficient design of power-delivery network
(PDN) in multiple voltage-island system-on-chip (SoC) designs. The first technique is …

Design of an efficient power delivery network in an soc to enable dynamic power management

B Amelifard, M Pedram - … of the 2007 international symposium on Low …, 2007 - dl.acm.org
Dynamic voltage scaling (DVS) is known to be one of the most efficient techniques for power
reduction of integrated circuits. Efficient low voltage DC-DC conversion is a key enabler for …

Simultaneous optimization of battery-aware voltage regulator scheduling with dynamic voltage and frequency scaling

Y Cho, Y Kim, Y Joo, K Lee, N Chang - Proceedings of the 2008 …, 2008 - dl.acm.org
Energy-aware task scheduling significantly reduces the total energy required by a system to
perform a particular job, by dynamically changing the clock frequency and supply voltage at …

[PDF][PDF] On-chip voltage regulation for power management in system-on-chip

J Gjanci - 2008 - Citeseer
Since the birth of the microprocessor the industry has continued to innovate and improve
performance. Upgrading microprocessor performance requires packing more transistors on …

Superrange: wide operational range power delivery design for both stv and ntv computing

X He, G Yan, Y Han, X Li - 2014 Design, Automation & Test in …, 2014 - ieeexplore.ieee.org
The load power range of modern processors is greatly enlarged because many advanced
power management techniques like dynamic voltage frequency scaling, Turbo boosting, and …

[PDF][PDF] Understanding Power Gating Mechanism Based on Workload Classification of Modern Heterogeneous Many-Core Mobile Platform in the Dark Silicon Era.

H Alrudainy, AK Marzook, M Hussein, R Shafik - Iraqi Journal for Electrical & …, 2024 - iasj.net
The rapid progress in mobile computing necessitates energy efficient solutions to support
substantially diverse and complex workloads. Heterogeneous many core platforms are …

A hardware/software concurrent design for a real-time SP@ ML MPEG2 video-encoder chip set

M Ikeda, T Okubo, T Abe, Y Ito… - … European Design and …, 1996 - ieeexplore.ieee.org
This paper presents a design for a real-time MPEG2 SP@ ML video-encoder chip set. Its
main features are: hardware/software partitioning based on a software encoder analysis …

Architectures intégrées de gestion de l'énergie pour les microsystèmes autonomes

G Waltisperger - 2011 - theses.hal.science
Augmenter la durée de vie d'une pile, voire s' en passer est aujourd'hui devenu une
obligation pour les microsystèmes. En effet, à cette échelle, le remplacement des piles et …

Bluetooth wireless handset for people with severe motor disabilities: Capstone design project for rehabilitation technology

Y Kim, J Lee, Y Koh, N Chang - 2011 IEEE International …, 2011 - ieeexplore.ieee.org
Even common daily-used devices such as a mobile phone or a remote controller can be a
big hurdle for disabled people. As the levels and types of disabilities have a wide variety, it is …