Microelectronic device packages, stacked microelectronic device packages, and methods for manufacturing microelectronic devices

SKD Ye, CH Chong - US Patent 7,504,284, 2009 - Google Patents
(57) ABSTRACT A stackable microelectronic package includes a first micro electronic die
attached to and electrically connecting with a first substrate. A second microelectronic die is …

Integrated circuit packaging system with a dual board-on-chip structure and method of manufacture thereof

HG Shin, HJ Chi, AL Choi - US Patent 8,106,498, 2012 - Google Patents
A method of manufacture of an integrated circuit packaging system includes: providing a first
board-on-chip-structure having a first integrated circuit die mounted over a substrate and the …

Microelectronic device packages, stacked microelectronic device packages, and methods for manufacturing microelectronic devices

SKD Ye, CH Chong - US Patent 8,030,748, 2011 - Google Patents
(57) ABSTRACT A stackable microelectronic package includes a first micro electronic die
attached to and electrically connecting with a first substrate. A second microelectronic die is …

Package-on-package stacked microelectronic structures

T Meyer, G Ofner - US Patent 10,211,182, 2019 - Google Patents
(57) ABSTRACT A package-on-package stacked microelectronic structure comprising a pair
of microelectronic packages attached to one another in a flipped configuration. In one …

Enhanced stacked microelectronic assemblies with central contacts and improved ground or power distribution

B Haba, W Zohni, RDW Crisp - US Patent 8,466,564, 2013 - Google Patents
A microelectronic assembly includes a dielectric element having at least one aperture and
electrically conductive elements thereon including terminals exposed at the second surface …

System and method for retaining memory modules

JE Shaw, R Manson, C Marsden, R Graham… - US Patent …, 2019 - Google Patents
The present invention is an apparatus and method for allowing for the use of commercial
dual inline memory module (DIMM) in high shock and vibration environments while …

Memory module and signal line arrangement method thereof

CN Yoon, KS Kim, D Kim, JJ Lee, KH Ko - US Patent 7,390,973, 2008 - Google Patents
The pesent invention discloses a memory module and a signal line arrangement method
thereof. The memory module includes memory chips mounted on both sidees in a mirror …

Self-aligned through vias for chip stacking

A Sitaram - US Patent App. 11/602,536, 2008 - Google Patents
An electronic component includes a first component and a second component, each having
a surface that includes a plurality of exposed contacts separated by an insulating material. A …

Electronic assemblies without solder and methods for their manufacture

JC Fjelstad - US Patent 7,981,703, 2011 - Google Patents
US7981703B2 - Electronic assemblies without solder and methods for their manufacture -
Google Patents US7981703B2 - Electronic assemblies without solder and methods for their …

Multi-level connector and use thereof that mitigates data signaling reflections

MD Hasse, N Na, NH Pham, LA Walls - US Patent 9,118,144, 2015 - Google Patents
The disclosure relates generally to apparatus and tech niques for mitigating signal
reflections for signals in a data processing system, and more specifically relates to a connec …