[HTML][HTML] Time-to-digital conversion techniques: A survey of recent developments
J Szyduczyński, D Kościelnik, M Miśkowicz - Measurement, 2023 - Elsevier
Time-to-digital converters (TDCs) are key components of time-mode circuits and enablers for
digital processing of analog signals encoded in time. Since design of time-mode circuits …
digital processing of analog signals encoded in time. Since design of time-mode circuits …
Re-thinking analog integrated circuits in digital terms: A new design concept for the IoT era
A steady trend towards the design of mostly-digital and digital-friendly analog circuits,
suitable to integration in mainstream nanoscale CMOS by a highly automated design flow …
suitable to integration in mainstream nanoscale CMOS by a highly automated design flow …
Challenges and opportunities toward fully automated analog layout design
Realizing the layouts of analog/mixed-signal (AMS) integrated circuits (ICs) is a complicated
task due to the high design flexibility and sensitive circuit performance. Compared with the …
task due to the high design flexibility and sensitive circuit performance. Compared with the …
A 0.3 V rail-to-rail three-stage OTA with high DC gain and improved robustness to PVT variations
This paper presents a novel 0.3 V rail-to-rail body-driven three-stage operational
transconductance amplifier (OTA). The proposed OTA architecture allows achieving high DC …
transconductance amplifier (OTA). The proposed OTA architecture allows achieving high DC …
NeuADC: Neural network-inspired synthesizable analog-to-digital conversion
Traditional analog-to-digital converters (ADCs) employ dedicated analog and mixed-signal
(AMS) circuits, requiring time-consuming manual design process. They also exhibit limited …
(AMS) circuits, requiring time-consuming manual design process. They also exhibit limited …
An all-standard-cell-based synthesizable SAR ADC with nonlinearity-compensated RDAC
Z Xu, N Ojima, S Li, T Iizuka - IEEE Transactions on Very Large …, 2021 - ieeexplore.ieee.org
We propose an all-standard-cell-based synthesizable successive-approximation-register
analog-to-digital converter (SAR ADC) which is automatically placed and routed (P&R) …
analog-to-digital converter (SAR ADC) which is automatically placed and routed (P&R) …
Standard-Cell-Based Comparators for Ultra-Low Voltage Applications: Analysis and Comparisons
This work is focused on the performance of three different standard-cell-based comparator
topologies, considering ultra-low-voltage (ULV) operation. The main application scenarios in …
topologies, considering ultra-low-voltage (ULV) operation. The main application scenarios in …
A 0.35 V-to-1.0 V synthesizable rail-to-rail dynamic voltage comparator based OAI&AOI logic
X Li, T Zhou, Y Ji, Y Li - Analog Integrated Circuits and Signal Processing, 2020 - Springer
In this letter, we present a two-stage rail-to-rail fully synthesizable dynamic voltage
comparator. To improve the speed and mismatch performance of the NAND & NOR-based …
comparator. To improve the speed and mismatch performance of the NAND & NOR-based …
NeuADC: Neural network-inspired RRAM-based synthesizable analog-to-digital conversion with reconfigurable quantization support
Traditional analog-to-digital converters (ADCs) employ dedicated analog and mixed-signal
(AMS) circuits and require time-consuming manual design process. They also exhibit limited …
(AMS) circuits and require time-consuming manual design process. They also exhibit limited …
CEPA: CNN-based early performance assertion scheme for analog and mixed-signal circuit simulation
The design and verification of analog and mixed-signal (AMS) circuits typically involve many
time-consuming simulations to qualify target specifications or optimize the design …
time-consuming simulations to qualify target specifications or optimize the design …