State of the art and future perspectives in advanced CMOS technology
The international technology roadmap of semiconductors (ITRS) is approaching the
historical end point and we observe that the semiconductor industry is driving …
historical end point and we observe that the semiconductor industry is driving …
Nanowire & nanosheet FETs for ultra-scaled, high-density logic and memory applications
A Veloso, T Huynh-Bao, P Matagne, D Jang… - Solid-State …, 2020 - Elsevier
We report on vertically stacked lateral nanowires (NW)/nanosheets (NS) gate-all-around
(GAA) FET devices as promising candidates to obtain a better power-performance metric for …
(GAA) FET devices as promising candidates to obtain a better power-performance metric for …
Enabling energy efficiency and polarity control in germanium nanowire transistors by individually gated nanojunctions
Germanium is a promising material for future very large scale integration transistors, due to
its superior hole mobility. However, germanium-based devices typically suffer from high …
its superior hole mobility. However, germanium-based devices typically suffer from high …
Vertical GeSn nanowire MOSFETs for CMOS beyond silicon
The continued downscaling of silicon CMOS technology presents challenges for achieving
the required low power consumption. While high mobility channel materials hold promise for …
the required low power consumption. While high mobility channel materials hold promise for …
Ge GAA FETs and TMD finfets for the applications beyond Si—A review
YJ Lee, GL Luo, FJ Hou, MC Chen… - IEEE Journal of the …, 2016 - ieeexplore.ieee.org
Two parts of work are included in this paper. In the first part, the novel Ge gate-all-around
field effect transistors (GAA FETs) are introduced and discussed. Fabrication of Ge GAA …
field effect transistors (GAA FETs) are introduced and discussed. Fabrication of Ge GAA …
Ge0.95Sn0.05 Gate-All-Around p-Channel Metal-Oxide-Semiconductor Field-Effect Transistors with Sub-3 nm Nanowire Width
We demonstrate Ge0. 95Sn0. 05 p-channel gate-all-around field-effect transistors (p-
GAAFETs) with sub-3 nm nanowire width (W NW) on a GeSn-on-insulator (GeSnOI) …
GAAFETs) with sub-3 nm nanowire width (W NW) on a GeSn-on-insulator (GeSnOI) …
Strained germanium gate-all-around PMOS device demonstration using selective wire release etch prior to replacement metal gate deposition
L Witters, H Arimura, F Sebaai… - IEEE transactions on …, 2017 - ieeexplore.ieee.org
Strained Ge p-channel gate-all-around (GAA) devices with Si-passivation are demonstrated
on high-density 45-nm active pitch starting from 300-mm SiGe strain relaxed buffer wafers …
on high-density 45-nm active pitch starting from 300-mm SiGe strain relaxed buffer wafers …
Fast growth synthesis of mesoporous germanium films by high frequency bipolar electrochemical etching
Mesoporous germanium (MP-Ge) has been predicted to play an important role in a wide
range of potential applications. These porous Ge networks are characterized by physical …
range of potential applications. These porous Ge networks are characterized by physical …
III-V/Ge MOS device technologies for low power integrated systems
CMOS utilizing high mobility III-V/Ge channels on Si substrates is expected to be one of the
promising devices for high performance and low power integrated systems in the future …
promising devices for high performance and low power integrated systems in the future …
ION Enhancement of Ge0.98Si0.02 Nanowire nFETs by High-κ Dielectrics
The HfxZryO2 with high Zr content is demonstrated to form the anti-ferroelectric tetragonal
phase (AFE t-phase). The peak dielectric constant (47) of Hf0. 2Zr0. 8O2 is achieved. By …
phase (AFE t-phase). The peak dielectric constant (47) of Hf0. 2Zr0. 8O2 is achieved. By …