A survey on optical network-on-chip architectures
Optical on-chip data transmission enabled by silicon photonics (SiP) is widely considered a
key technology to overcome the bandwidth and energy limitations of electrical interconnects …
key technology to overcome the bandwidth and energy limitations of electrical interconnects …
A survey of silicon photonics for energy-efficient manycore computing
S Pasricha, M Nikdast - IEEE Design & Test, 2020 - ieeexplore.ieee.org
A Survey of Silicon Photonics for Energy-Efficient Manycore Computing Page 1 60 2168-2356/20©2020
IEEE Copublished by the IEEE CEDA, IEEE CASS, IEEE SSCS, and TTTC IEEE Design&Test …
IEEE Copublished by the IEEE CEDA, IEEE CASS, IEEE SSCS, and TTTC IEEE Design&Test …
Optics in computing: From photonic network-on-chip to chip-to-chip interconnects and disintegrated architectures
Following a decade of radical advances in the areas of integrated photonics and computing
architectures, we discuss the use of optics in the current computing landscape attempting to …
architectures, we discuss the use of optics in the current computing landscape attempting to …
A survey of on-chip optical interconnects
Numerous challenges present themselves when scaling traditional on-chip electrical
networks to large manycore processors. Some of these challenges include high latency …
networks to large manycore processors. Some of these challenges include high latency …
Designing chip-level nanophotonic interconnection networks
Technology scaling will soon enable high-performance processors with hundreds of cores
integrated onto a single die, but the success of such systems could be limited by the …
integrated onto a single die, but the success of such systems could be limited by the …
Performance guidelines for WDM interconnects based on silicon microring resonators
Performance guidelines for WDM interconnects based on silicon microring resonators Page 1
Performance Guidelines for WDM Interconnects Based on Silicon Microring Resonators Kyle …
Performance Guidelines for WDM Interconnects Based on Silicon Microring Resonators Kyle …
Crosstalk penalty in microring-based silicon photonic interconnect systems
M Bahadori, S Rumley, H Jayatilleka… - Journal of Lightwave …, 2016 - opg.optica.org
We examine inter-channel and intra-channel crosstalk power penalties between non-return-
to-zero on-off keying (NRZ-OOK) wavelength-division-multiplexing (WDM) channels for …
to-zero on-off keying (NRZ-OOK) wavelength-division-multiplexing (WDM) channels for …
LumiNOC: A power-efficient, high-performance, photonic network-on-chip
To meet energy-efficient performance demands, the computing industry has moved to
parallel computer architectures, such as chip multiprocessors (CMPs), internally …
parallel computer architectures, such as chip multiprocessors (CMPs), internally …
Galaxy: A high-performance energy-efficient multi-chip architecture using photonic interconnects
The scalability trends of modern semiconductor technology lead to increasingly dense
multicore chips. Unfortunately, physical limitations in area, power, off-chip bandwidth, and …
multicore chips. Unfortunately, physical limitations in area, power, off-chip bandwidth, and …
METEOR: Hybrid photonic ring-mesh network-on-chip for multicore architectures
S Bahirat, S Pasricha - ACM Transactions on Embedded Computing …, 2014 - dl.acm.org
With increasing application complexity and improvements in process technology, Chip
MultiProcessors (CMPs) with tens to hundreds of cores on a chip are becoming a reality …
MultiProcessors (CMPs) with tens to hundreds of cores on a chip are becoming a reality …