Correlation-enhanced power analysis collision attack

A Moradi, O Mischke, T Eisenbarth - … , Santa Barbara, USA, August 17-20 …, 2010 - Springer
Side-channel based collision attacks are a mostly disregarded alternative to DPA for
analyzing unprotected implementations. The advent of strong countermeasures, such as …

[图书][B] Handbook on securing cyber-physical critical infrastructure

SK Das, K Kant, N Zhang - 2012 - books.google.com
The worldwide reach of the Internet allows malicious cyber criminals to coordinate and
launch attacks on both cyber and cyber-physical infrastructure from anywhere in the world …

BoMaNet: Boolean masking of an entire neural network

A Dubey, R Cammarota, A Aysu - Proceedings of the 39th International …, 2020 - dl.acm.org
Recent work on stealing machine learning (ML) models from inference engines with
physical side-channel attacks warrant an urgent need for effective side-channel defenses …

Physical side-channel attacks and covert communication on FPGAs: A survey

SS Mirzargar, M Stojilović - 2019 29th International Conference …, 2019 - ieeexplore.ieee.org
Field-programmable gate arrays (FPGAs) are, like CPUs, susceptible to side-channel
information leakage and covert communication. The malleability of FPGAs enables users to …

Hardware Moving Target Defenses against Physical Attacks: Design Challenges and Opportunities

DS Koblah, F Ganji, D Forte, S Tajik - … of the 9th ACM Workshop on …, 2022 - dl.acm.org
The concept of moving target defense (MTD) has entrenched itself as a viable strategy to
reverse the typical asymmetries in cyber warfare. MTDs are technologies that seek to make …

Guarding machine learning hardware against physical side-channel attacks

A Dubey, R Cammarota, V Suresh, A Aysu - ACM Journal on Emerging …, 2022 - dl.acm.org
Machine learning (ML) models can be trade secrets due to their development cost. Hence,
they need protection against malicious forms of reverse engineering (eg, in IP piracy). With a …

BCDL: A high speed balanced DPL for FPGA with global precharge and no early evaluation

M Nassar, S Bhasin, JL Danger, G Duc… - … Design, Automation & …, 2010 - ieeexplore.ieee.org
In this paper, we present BCDL (Balanced Cell-based Dual-rail Logic), a new counter-
measure against Side Channel Attacks (SCA) on cryptoprocessors implementing …

Review of gate‐level differential power analysis and fault analysis countermeasures

H Marzouqi, M Al‐Qutayri, K Salah - IET Information Security, 2014 - Wiley Online Library
Hardware implementation of modern crypto devices paves the way for a special type of
cryptanalysis, which is known as side channel analysis (SCA) attacks. These attacks are …

Overview of dual rail with precharge logic styles to thwart implementation-level attacks on hardware cryptoprocessors

JL Danger, S Guilley, S Bhasin… - 2009 3rd International …, 2009 - ieeexplore.ieee.org
The security of cryptographic implementations relies not only on the algorithm quality but
also on the countermeasures to thwart attacks aiming at disclosing the secrecy. These …

[HTML][HTML] Gate-level hardware countermeasure comparison against power analysis attacks

E Tena-Sánchez, FE Potestad-Ordóñez… - Applied Sciences, 2022 - mdpi.com
The fast settlement of privacy and secure operations in the Internet of Things (IoT) is
appealing in the selection of mechanisms to achieve a higher level of security at minimum …