A novel fixed-point square root algorithm and its digital hardware design

RVW Putra - International Conference on ICT for Smart Society, 2013 - ieeexplore.ieee.org
Square root operation is one of the basic important operation in digital signal processing. It
will calculate the square root value from the given input. This operation is known hard to …

[PDF][PDF] Implementation of fixed and floating point square root using nonrestoring algorithm on FPGA

A Nanhe, G Gawali, S Ahire, K Sivasankaran - International Journal of …, 2013 - ijcee.org
Square root is one of the fundamental arithmetic operations used in recent generation
processors. In this paper, we present pipelined architecture to implement 8 bit fixed and …

Fast bit-accurate reciprocal square root

L Pizano-Escalante, R Parra-Michel, JV Castillo… - Microprocessors and …, 2015 - Elsevier
The reciprocal square root (RSR) is an operation extensively used in signal processing
algorithms, where it is necessary the design of RSR architectures in fixed-point (FxP) …

A Configurable IP Core for Calculating the Integer Square Root for Serial and Parallel Implementations in FPGA

V Matyukha, S Voloshchuk, S Mosin - Electronics, 2022 - mdpi.com
The development of digital technologies is in many ways associated with an improvement of
integrated technologies, microelectronic components, and the capabilities of hardware …

On-chip implementation of a low-latency bit-accurate reciprocal square root unit

CR Aguilera-Galicia, O Longoria-Gandara… - Integration, 2018 - Elsevier
Many applications such as gaming, digital signal processing and communications systems,
require computation of the reciprocal square root operation (RSR). Although several …

A design methodology for approximate multipliers in convolutional neural networks: A case of MNIST

K Shirane, T Yamamoto… - International Journal of …, 2021 - search.proquest.com
In this paper, we present a case study on approximate multipliers for MNIST Convolutional
Neural Network (CNN). We apply approximate multipliers with different bit-width to the …

An Optimization Methodology for Designing Hardware-Based Function Evaluation Modules with Reduced Complexity

G González-Díaz-Conti, O Longoria-Gandara… - Circuits, Systems, and …, 2022 - Springer
The evaluation of mathematical functions is a critical task in several hardware designs, and
piecewise polynomial approximation (PPA) is one of the main techniques widely used for …

An improved hardware design for matrix inverse based on systolic array QR decomposition and piecewise polynomial approximation

LC Santos, AC Atoche, JV Castilloy… - 2015 International …, 2015 - ieeexplore.ieee.org
Reconstructive signal processing algorithms involve complex computations, where matrix
inversion is one of the most complex operations required by several signal processing …

Hardware implementation of single iterated multiplicative inverse square root

J Luo, Q Huang, H Luo, Y Zhi, X Wang - Elektronika ir …, 2017 - eejournal.ktu.lt
Inverse square root has played an important role in Cholesky decomposition, which devoted
to hardware efficient compressed sensing. However, the performance is usually limited by …

[PDF][PDF] ИНИЦИАТИВИ, СВЪРЗАНИ С УМНИ РЕШЕНИЯ В ИНТЕЛИГЕНТНИТЕ ГРАДОВЕ

НК Николов, ПЦ Павлов - КОМПЮТЪРНИ НАУКИ И … - csejournal.cs.tu-varna.bg
За да се превърне един град в интелигентен, са необходими различни умни решения.
Те водят след себе си до подобряване на качеството на живота и услугите на жителите …