The design, simulations, and tests of a 16-channel chip for solid-state detectors are
presented. The chip produces sparsified pulse trains for both linear (pulse height) and timing …

In this paper a useful CMOS fully-differential buffer topology is presented. The proposed
solution, performing the common mode feedback operation, shows a rail-to-rail …

An all-OTA analog buffer amplifier configuration capable of driving large resistive loads is
presented. The proposed configuration features high input swing, gain tunability, wide …

An amplifier arrangement includes a first amplifier powered by a pair of lower Voltage power
Supplies, a Second amplifier powered by a pair of higher Voltage power Supplies and a …

This paper presents a CMOS output stage devised for driving heavy resistive loads. An
operational amplifier of this type has been fabricated in a 3/spl mu/m double-polysilicon …

Experimental study of operational transconductance amplifier (OTA) buffer amplifier
configurations capable of driving resistive load<; 100 Ω is presented in this paper. The OTA …

Design and Analysis of High Efficiency Line Drivers for xDSL covers the most important
building block of an xDSL (ADSL, VDSL,...) system: the line driver. Traditional Class AB line …

This paper discusses the design of a high gain, general purpose op amps. The op amp is
based on a novel cascaded design using comparators and with structural simplicity …

A simple 1.5 V rail-to-rail CMOS current conveyor is presented. The circuit is developed
based on a complementary source follower with a common-source output stage. The circuit …

The standard implementation of a voltage buffer uses a two-stage opamp with total negative
feedback; this results in good linearity and low output impedance but also in bandwidth …