Two trends call into question the current practice of fabricating microprocessors and DRAMs as different chips on different fabrication lines. The gap between processor and DRAM …
P Chao, CY Kao, YS Ruan… - Proceedings of the …, 2019 - openaccess.thecvf.com
State-of-the-art neural network architectures such as ResNet, MobileNet, and DenseNet have achieved outstanding accuracy over low MACs and small model size counterparts …
A Behm, S Palkar, U Agarwal, T Armstrong… - Proceedings of the …, 2022 - dl.acm.org
Many organizations are shifting to a data management paradigm called the" Lakehouse," which implements the functionality of structured data warehouses on top of unstructured …
Hardware specialization, in the form of accelerators that provide custom datapath and control for specific algorithms and applications, promises impressive performance and …
Is your memory hierarchy stopping your microprocessor from performing at the high level it should be? Memory Systems: Cache, DRAM, Disk shows you how to resolve this problem …
The most exciting development in parallel computer architecture is the convergence of traditionally disparate approaches on a common machine structure. This book explains the …
K Li, P Hudak - ACM Transactions on Computer Systems (TOCS), 1989 - dl.acm.org
The memory coherence problem in designing and implementing a shared virtual memory on loosely coupled multiprocessors is studied in depth. Two classes of algorithms, centralized …
Increasing demand for power-efficient, high-performance computing has spurred a growing number and diversity of hardware accelerators in mobile and server Systems on Chip …
High density, low leakage and non-volatility are the attractive features of Spin-Transfer- Torque-RAM (STT-RAM), which has made it a strong competitor against SRAM as a …