An efficient VLSI architecture of 2‐D finite impulse response filter using enhanced approximate compressor circuits
VK Odugu, SP K - International Journal of Circuit Theory and …, 2021 - Wiley Online Library
The very large‐scale integration (VLSI) design‐based architectures of 2‐D filters must have
low power consumption and high speed rather than accuracy for image processing …
low power consumption and high speed rather than accuracy for image processing …
[PDF][PDF] Design and implementation of DA FIR filter for bio-inspired computing architecture
BUV Prashanth, MR Ahmed… - International Journal of …, 2021 - academia.edu
This paper elucidates the system construct of DA-FIR filter optimized for design of distributed
arithmetic (DA) finite impulse response (FIR) filter and is based on architecture with tightly …
arithmetic (DA) finite impulse response (FIR) filter and is based on architecture with tightly …
[PDF][PDF] Implementation of Low Power Generic 2D FIR Filter Bank Architecture Using Memory-based Multipliers.
VK Odugu, CV Narasimhulu, KS Prasad - J. Mobile Multimedia, 2022 - researchgate.net
In this paper, a generic filter bank architecture for 2D FIR filter is proposed using block
processing, symmetry in the filter coefficients, and memorybased multipliers. The different …
processing, symmetry in the filter coefficients, and memorybased multipliers. The different …
A low power transistor level FIR filter implementation using CMOS 45 nm technology
Digital finite impulse response (FIR) filters are widely used in signal processing fields, due to
their stability and linear-phase property. In this paper, the low area FIR filter is designed by …
their stability and linear-phase property. In this paper, the low area FIR filter is designed by …
A novel filter-bank architecture of 2D-FIR symmetry filters using LUT based multipliers
VK Odugu, CV Narasimhulu, KS Prasad - Integration, 2022 - Elsevier
In this paper, a novel block-based generic filter bank architecture is proposed for various
Two Dimensional (2D) symmetry Finite Impulse Response (FIR) filers. It is implemented to …
Two Dimensional (2D) symmetry Finite Impulse Response (FIR) filers. It is implemented to …
[PDF][PDF] An efficient LUT design on FPGA for memory-based multiplication.
CS Vinitha, RK Sharma - Iranian Journal of Electrical & Electronic …, 2019 - sid.ir
An efficient Lookup Table (LUT) design for memory-based multiplier is proposed. This
multiplier can be preferred in DSP computation where one of the inputs, which is filter …
multiplier can be preferred in DSP computation where one of the inputs, which is filter …
[HTML][HTML] Implementation of distributed arithmetic-based symmetrical 2-D block finite impulse response filter architectures
PC Ch, JB Seventline - F1000Research, 2023 - ncbi.nlm.nih.gov
Background: This paper presents an efficient two-dimensional (2-D) finite impulse response
(FIR) filter using block processing for two different symmetries. Architectures for a general …
(FIR) filter using block processing for two different symmetries. Architectures for a general …
Area and energy-efficient approximate distributive arithmetic architecture for LMS adaptive FIR filter
CS Vinitha, RK Sharma - 2020 International Conference for …, 2020 - ieeexplore.ieee.org
A novel approximate DA architecture is proposed for adaptive FIR filter. LMS algorithm is
used to update the weights of the filter. In this architecture we combined the CSD number …
used to update the weights of the filter. In this architecture we combined the CSD number …
RDO-WT: optimised Wallace Tree multiplier based FIR filter for signal processing applications
ABSTRACT Digital Signal Processing (DSP) and communication applications utilise a Finite
Impulse Response (FIR) filter which is key component for digital communication. Moreover …
Impulse Response (FIR) filter which is key component for digital communication. Moreover …
Implementation of block-based diagonal and quadrantal symmetry type 2D-FIR filter architectures using DA technique
VS Reddy, AV Juliet, ER Thuraka, VK Odugu - Computers and Electrical …, 2024 - Elsevier
The efficient architectures of Two-Dimensional (2D) Finite Impulse Response (FIR) filters are
proposed for image processing applications. The performance metrics such as power …
proposed for image processing applications. The performance metrics such as power …