A new class of asynchronous A/D converters based on time quantization

E Allier, G Sicard, L Fesquet… - … Circuits and Systems …, 2003 - ieeexplore.ieee.org
This work is a contribution to a drastic change in standard signal processing chains. The
main objective is to reduce the power consumption by one or two orders of magnitude …

Low-power high-speed current comparator design

D Banks, C Toumazou - Electronics Letters, 2008 - search.proquest.com
A new current comparator is proposed that is optimised for low power consumption whilst
maintaining high speed. This novel comparator design offers a reduction in power …

[图书][B] Current Sense Amplifiers for Embedded SRAM in High-Performance System-on-a-Chip Designs: For Embedded SRAM in High-Performance System-on-a-Chip …

B Wicht - 2003 - books.google.com
System-on-a-chip (SoC) designs result in a wide range of high-complexity, high-value
semiconductor products. As the technology scales towards smaller feature sizes and chips …

A high-speed current conveyor based current comparator

R Chavoshisani, O Hashemipour - Microelectronics Journal, 2011 - Elsevier
In this paper, a new high-speed current mode comparator based on inherent current
conveyor and positive feedback properties is presented. This novel approach has resulted in …

Development of a front end ASIC for Dark Matter directional detection with MIMAC

JP Richer, G Bosson, O Bourrion, C Grignon… - Nuclear Instruments and …, 2010 - Elsevier
A front end ASIC (BiCMOS-SiGe 0.35 μm) has been developed within the framework of the
MIMAC detector project, which aims at directional detection of non-baryonic Dark Matter …

Design of low power 5-bit hybrid flash ADC

SM Mayur, RK Siddharth, YBN Kumar… - 2016 IEEE Computer …, 2016 - ieeexplore.ieee.org
In this paper, a low power 5-bit hybrid flash architecture is proposed. The proposed analog-
to-digital converter (ADC) uses appropriate combination of both conventional double-tail …

Transistor-mismatch-insensitive current comparator cell

C Wang, OM Ahmad, MNS Swamy - US Patent 6,586,972, 2003 - Google Patents
This invention relates to a method and apparatus for converting a current signal into a two-
level output voltage depending on a reference current signal. In one embodiment, a first …

Development and validation of a 64 channel front end ASIC for 3D directional detection for MIMAC

JP Richer, O Bourrion, G Bosson… - Journal of …, 2011 - iopscience.iop.org
A front end ASIC has been designed to equip the\textmu TPC prototype developed for the
MIMAC project, which requires 3D reconstruction of low energy particle tracks in order to …

Analog implementation of erosion/dilation, median and order statistics filters

S Vlassis, K Doris, S Siskos, I Pitas - Pattern Recognition, 2000 - Elsevier
In this work an analog implementation of nonlinear filters based on a current-mode
sorting/selection network is presented. Three nonlinear filters, an erosion/dilation, a median …

CMOS integrated single electron transistor electrometry (CMOS-SET) circuit design for nanosecond quantum-bit read-out

TM Gurrieri, MS Carroll, MP Lilly… - 2008 8th IEEE …, 2008 - ieeexplore.ieee.org
Novel single electron transistor (SET) read-out circuit designs are described. The circuits
use a silicon SET interfaced to a CMOS voltage mode or current mode comparator to obtain …