BSIM-CMG: Standard FinFET compact model for advanced circuit design
This work presents new compact models that capture advanced physical effects presented
in industry FinFETs. The presented models are introduced into the industry standard …
in industry FinFETs. The presented models are introduced into the industry standard …
A vertically integrated junctionless nanowire transistor
A vertically integrated junctionless field-effect transistor (VJ-FET), which is composed of
vertically stacked multiple silicon nanowires (SiNWs) with a gate-all-around (GAA) structure …
vertically stacked multiple silicon nanowires (SiNWs) with a gate-all-around (GAA) structure …
Refined DC and low-frequency noise characterization at room and cryogenic temperatures of vertically stacked silicon nanosheet FETs
B Cretu, A Veloso, E Simoen - IEEE Transactions on Electron …, 2022 - ieeexplore.ieee.org
In this work, two types of gate-all-around (GAA) vertically stacked silicon nanosheet (NS)
FETs are investigated, the main difference being the vertical distance between the stacked …
FETs are investigated, the main difference being the vertical distance between the stacked …
Compact modeling of nanoscale trapezoidal FinFETs
N Fasarakis, TA Karatsori… - … on Electron Devices, 2013 - ieeexplore.ieee.org
An analytical compact model for the drain current of undoped or lightly doped nanoscale
FinFETs with trapezoidal cross section is proposed. The compact model of rectangular …
FinFETs with trapezoidal cross section is proposed. The compact model of rectangular …
Unified FinFET compact model: Modelling trapezoidal triple-gate FinFETs
A unified FinFET compact model is proposed for devices with complex fin cross-sections. It is
represented in a normalized form, where only four different model parameters are needed …
represented in a normalized form, where only four different model parameters are needed …
Electrical characteristics of n-type vertically stacked nanowires operating up to 600 K
This paper aims at analyzing the electrical characteristics of n-type vertically stacked
nanowires with variable fin width, operating in the temperature range of 300–600 K. Basic …
nanowires with variable fin width, operating in the temperature range of 300–600 K. Basic …
Analytical modeling of subthreshold swing in undoped trigate SOI MOSFETs
H Ghanatian, SE Hosseini - Journal of Computational Electronics, 2016 - Springer
A new analytical model for the subthreshold swing of nanoscale undoped trigate silicon-on-
insulator metal–oxide–semiconductor field-effect transistors (MOSFETs) is proposed, based …
insulator metal–oxide–semiconductor field-effect transistors (MOSFETs) is proposed, based …
A new threshold voltage model for short-channel junctionless inverted T-shaped gate FETs (JLITFET)
TK Chiang - IEEE Transactions on Nanotechnology, 2016 - ieeexplore.ieee.org
On the basis of the quasi-three-dimensional scaling equation, equivalent number of gates,
and minimum bottom-central potential, a novel threshold voltage model for the short-channel …
and minimum bottom-central potential, a novel threshold voltage model for the short-channel …
Equivalent DG dimensions concept for compact modeling of short-channel and thin body GAA MOSFETs including quantum confinement
K Yılmaz, G Darbandy, G Reimbold… - … on Electron Devices, 2020 - ieeexplore.ieee.org
In this work, short-channel effects (SCEs) in cylindrical gate-all-around (GAA) MOSFETs with
intrinsic or lightly doped channels are analytically described by using the conformal …
intrinsic or lightly doped channels are analytically described by using the conformal …
A surface-field-based model for nanowire MOSFETs with spatial variations of doping profiles
Q Cheng, C Hong, JB Kuo… - IEEE Transactions on …, 2014 - ieeexplore.ieee.org
We report a novel method to solve the nonlinear 1-D Poisson's equation for the gate-all-
around (GAA) nanowire MOSFETs with nonuniform doping profiles. An algebraic relation …
around (GAA) nanowire MOSFETs with nonuniform doping profiles. An algebraic relation …