Method and apparatus for evaluating and optimizing a signaling system

J Zerbe, PS Chau, WF Stonecypher - US Patent 7,490,275, 2009 - Google Patents
A method and apparatus for evaluating and optimizing a signaling system is described. A
pattern of test information is generated in a transmit circuit of the system and is transmitted to …

Margin test methods and circuits

A Ho, V Stojanovic, BW Garlepp, FF Chen - US Patent 7,627,029, 2009 - Google Patents
Described are methods and circuits for margin testing digital receivers. These methods and
circuits prevent margins from collapsing in response to erroneously received data, and can …

Circuit, apparatus and method for capturing a representation of a waveform from a clock-data recovery (CDR) unit

D Kim, J Zerbe, M Horowitz, W Stonecypher - US Patent 7,076,377, 2006 - Google Patents
A circuit, apparatus and method obtains system margin at the receive circuit using phase
shifted data sampling clocks while allowing the CDR to remain synchronized with the …

DFE margin test methods and circuits that decouple sample and feedback timing

BS Leibowitz, BW Garlepp - US Patent 7,590,175, 2009 - Google Patents
Described are methods and circuits for margin testing digital receivers. These methods and
circuits prevent margins from collapsing in response to erroneously received data, and can …

Circuit, apparatus and method for capturing a representation of a waveform from a clock-data recovery (CDR) unit

D Kim, J Zerbe, M Horowitz, W Stonecypher - US Patent 7,765,074, 2010 - Google Patents
A serial data system consists of a transmit circuit for trans mitting data bits on a serial link to a
receive circuit. Most receive circuits include a Clock-Data Recovery (“CDR) cir cuit to …

Data transmission apparatus using asynchronous dual-rail bus and method therefor

BS Choi, DS Har - US Patent 7,512,190, 2009 - Google Patents
The present invention relates to a data transmission apparatus using an asynchronous dual-
rail bus and a method therefor which can reduce power consumption for transferring data by …

Receiver circuit architectures

A Ho, V Stojanovic, BW Garlepp, FF Chen - US Patent 8,385,492, 2013 - Google Patents
5'9l7'856 A 6/1999 Torsti" 375/23'1 2003/0223489 A1 12/2003 Smee. _............. 375/233
5'949'8l9 A 9/l999 Bhmaég'I'l'égal'3757222 2004/0001566 A1 1/2004 Gregorlus et al …

Data eye monitor method and apparatus

AG Gara, JA Marcella, M Ohmacht - US Patent 8,108,738, 2012 - Google Patents
An apparatus and method for providing a data eye monitor. The data eye monitor apparatus
utilizes an inverter/latch string circuit and a set of latches to save the data eye for providing …

All-digital voltage monitor (ADVM) with single-cycle latency

B Suyoung, E Samson, W Lim, C Augustine… - US Patent …, 2020 - Google Patents
An all-digital voltage monitor (ADVM) generates a multi-bit output code that changes in
proportion to a voltage being monitored, by leveraging the voltage impact on a gate delay …

Method and apparatus for interference cancellation in wireless receivers

TL Fulghum - US Patent 7,924,909, 2011 - Google Patents
US7924909B2 - Method and apparatus for interference cancellation in wireless receivers -
Google Patents US7924909B2 - Method and apparatus for interference cancellation in wireless …