[图书][B] Digital signal processing with field programmable gate arrays

U Meyer-Baese, U Meyer-Baese - 2007 - Springer
Asia area prefer Verilog, while US east coast and Europe more frequently use VHDL. For
DSP with FPGAs both languages seem to be well suited, although some VHDL examples …

Reconfigurable computing architectures

R Tessier, K Pocek, A DeHon - Proceedings of the IEEE, 2015 - ieeexplore.ieee.org
Reconfigurable architectures can bring unique capabilities to computational tasks. They
offer the performance and energy efficiency of hardware with the flexibility of software. In …

Reconfigurable computing systems

K Bondalapati, VK Prasanna - Proceedings of the IEEE, 2002 - ieeexplore.ieee.org
Reconfigurable computing is emerging as the new paradigm for satisfying the simultaneous
demand for application performance and flexibility. The ability to customize the architecture …

Evaluation of CORDIC algorithms for FPGA design

J Valls, M Kuhlmann, KK Parhi - Journal of VLSI signal processing systems …, 2002 - Springer
This paper presents a study of the suitability for FPGA design of full custom based CORDIC
implementations. Since all these methods are based on redundant arithmetic, the FPGA …

Design and evaluation of a hardware/software FPGA-based system for fast image processing

JA Kalomiros, J Lygouras - Microprocessors and Microsystems, 2008 - Elsevier
We evaluate the performance of a hardware/software architecture designed to perform a
wide range of fast image processing tasks. The system architecture is based on hardware …

Cameron: high level language compilation for reconfigurable systems

J Hammes, B Rinker, W Bohm, W Najjar… - … Techniques (Cat. No …, 1999 - ieeexplore.ieee.org
This paper presents the Cameron Project, which aims to provide a high level, algorithmic
language and optimizing compiler for the development of image processing applications on …

On the viability of FPGA-based integrated coprocessors

Albaharna, Cheung - … IEEE Symposium on FPGAs for Custom …, 1996 - ieeexplore.ieee.org
The paper examines the viability of using integrated programmable logic as a coprocessor
to support a host CPU core. This adaptive coprocessor is compared to a VLIW machine in …

A study about FPGA-based digital filters

J Valls, MM Peiró, T Sansaloni… - 1998 IEEE Workshop on …, 1998 - ieeexplore.ieee.org
A set of operators suitable for digit-serial FIR filtering is presented. The canonical and
inverted forms are studied. In each of these structures both the symmetrical and anti …

An overview of the COBRA-ABS high level synthesis system for multi-FPGA systems

AA Duncan, DC Hendry, P Gray - … . IEEE Symposium on FPGAs …, 1998 - ieeexplore.ieee.org
This paper presents an overview of the COBRA-ABS behavioural high-level synthesis tool.
COBRA-ABS has been designed to synthesise custom architectures for arithmetic intensive …

X-centric: a survey on compute-, memory-and application-centric computer architectures

S Rheindt, T Sabirov, O Lenke, T Wild… - Proceedings of the …, 2020 - dl.acm.org
Big Data and machine learning constitute the multifaceted challenge of computer
engineering in the past decade. The meaningful processing of vast amounts of unstructured …