[PDF][PDF] A new logic circuits optimization algorithm using bipartite graph

OA Al-Ghanimi, HK Khafaji - Indonesian Journal of Electrical …, 2022 - academia.edu
Designing a logic circuit from the scratch requires its description in logical expression,(eg
sum of products), and then the expression should be optimized to diminish the cost and …

Implementation of frequency encoded all optical reversible logic

NK Mishra, U Chaurasiya, S Srivastava… - Journal of Optical …, 2024 - degruyter.com
Reversible gate has been one of the emerging research areas that ensure continual process
of innovation trends that explore and utilizes the resources. Due to the increasing power …

Assessing the performance of quantum gates in presence of Superposition state using IBMQ Server

AK Das, S Panda, C Mukherjee… - 2023 IEEE Fifth …, 2023 - ieeexplore.ieee.org
Quantum computation is a field that leverages the concept of quantum physics to
revolutionize computing capabilities. Quantum bits, or qubits, are used in quantum …

Engineered Bacterial Transcription Units Controlled by RNA: DNA Triplexes

N FOULADI GHARESHIRAN - thesis.unipd.it
Organisms can control gene expression at different levels, for example by rendering some
parts of the genome less accessible to RNA polymerase or by changing the affinity of the …

Design and Verification of 3D Network-on-Chip Router

G Kaur, D Bansal - International Conference on Flexible Electronics for …, 2022 - Springer
Devices with rapid speed, low power, and minimal space usage are necessary for modern
life. An increase in the amount of data transfer from one IP block to another existing on the …

[PDF][PDF] Design of Complex Adders and Parity Generators Using Reversible Gates

S Bhattacharya, S Goswami, A Sen - academia.edu
This paper shows efficient design of an odd and even parity generator, a 4-bit ripple carry
adder, and a 2-bit carry look ahead adder using reversible gates. Number of reversible …

[PDF][PDF] Design of Multiplexers, De Subtractor using Reve

S Bhattacharya - academia.edu
Design of Multiplexers, De Subtractor using Reve esign of Multiplexers, Decoder and a Full
Subtractor using Reversible Gates eco Page 1 International Journal of Latest Technology in E …