Dynamically specialized datapaths for energy efficient computing

V Govindaraju, CH Ho… - 2011 IEEE 17th …, 2011 - ieeexplore.ieee.org
Due to limits in technology scaling, energy efficiency of logic devices is decreasing in
successive generations. To provide continued performance improvements without …

[图书][B] VLSI memory chip design

K Itoh - 2013 - books.google.com
The VLSI memory era truly began when the first production of semiconduc tor memory was
announced by IBM and Intel in 1970. The announcement had a profound impact on my …

A low power SRAM using auto-backgate-controlled MT-CMOS

K Nii, H Makino, Y Tujihashi… - … Symposium on Low …, 1998 - ieeexplore.ieee.org
We have proposed a low power SRAM using an effective method called" ABC-MT-CMOS". It
controls the backgates to reduce the leakage current when the SRAM is not activated (sleep …

Dynamic fine-grain leakage reduction using leakage-biased bitlines

S Heo, K Barr, M Hampton, K Asanović - ACM SIGARCH Computer …, 2002 - dl.acm.org
Leakage power is dominated by critical paths, and hence dynamic deactivation of fast
transistors can yield large savings. We introduce metrics for comparing fine-grain dynamic …

Design techniques and architectures for low-leakage SRAMs

A Calimera, A Macii, E Macii… - IEEE Transactions on …, 2012 - ieeexplore.ieee.org
In high performance Systems-on-Chip, leakage power consumption has become
comparable to the dynamic component, and its relevance increases as technology scales …

MTCMOS sequential circuits

J Kao, A Chandrakasan - … of the 27th European Solid-State …, 2001 - ieeexplore.ieee.org
Multi-threshold CMOS is an increasingly popular circuit technique that enables high
performance and low power operation, but requires sequential circuit structures that can …

Static energy reduction techniques for microprocessor caches

H Hanson, MS Hrishikesh, V Agarwal… - … Transactions on Very …, 2003 - ieeexplore.ieee.org
Microprocessor performance has been improved by increasing the capacity of on-chip
caches. However, the performance gain comes at the price of static energy consumption due …

Data-retention flip-flops for power-down applications

H Mahmoodi-Meimand, K Roy - 2004 IEEE International …, 2004 - ieeexplore.ieee.org
A novel technique for retaining data in flip-flops in power-down applications is presented. In
flip-flops data is stored in cross-coupled inverters. Cross-coupled inverters can hold their …

Virtual and backgate supply line circuit

H Notani - US Patent 6,559,708, 2003 - Google Patents
(57) ABSTRACT A semiconductor integrated circuit includes: a first MOS transistor having
one Source/drain electrode for receiving a power Supply Voltage and the other Source/drain …

An MTCMOS design methodology and its application to mobile computing

HS Won, KS Kim, KO Jeong, KT Park, KM Choi… - Proceedings of the …, 2003 - dl.acm.org
The Multi-Threshold CMOS (MTCMOS) technology provides a solution to the high
performance and low power design requirements of modern designs. While the low Vth …