BACKGROUND Error Correction Code (ECC) techniques are commonly used in read
operations of memory systems to detect errors in the data and to correct the errors. The …

A controller includes an internal memory to store an address and a memory control unit
operatively coupled with the internal memory. The memory control unit includes logic to …

A memory repair circuit for repairing one or more failures in an embedded memory includes
at least one fuse register and state machine circuitry coupled to the fuse register. The state …

BACKGROUND Integrated circuit speeds continue to increase and the amount of data
communicated between circuits continues to increase to meet the demands of system …

2. Description of the Related Art Conventional memory testing checks only if any errors have
occurred in basic memory operations, referred to as a functional test. In a functional test …

Ltd.(57) ABSTRACT A self-repair device includes an ARE (array rupture electrical fuse)
array block configured to store fail addresses; an ARE control block configured to control a …

An integrated circuit including an array of memory cells, volatile storage, non-volatile storage
and a circuit. The circuit is configured to sense first addresses of first defective memory cells …

A display system including a processor configured to transmit image data and command
data, the command data including a first command corresponding to storing the image data …

A controller includes an internal memory to store an address and a memory control unit
operatively coupled with the internal memory. The memory control unit includes logic to …

Methods and apparatuses are disclosed in which a repair instruction, such as from a tester,
causes an integrated circuit undergoing testing to substitute defective locations of a first set …