A fault-tolerant single-phase five-level inverter for grid-independent PV systems

K Sivakumar - IEEE Transactions on Industrial Electronics, 2015 - ieeexplore.ieee.org
In this paper, a fault-tolerant single-phase five-level inverter configuration is proposed for
photovoltaic (PV) generation systems. Conventional two-level inverters are popularly used …

Torque ripple suppression method with reduced switching frequency for open-winding PMSM drives with common DC bus

W Hu, H Nian, T Zheng - IEEE Transactions on Industrial …, 2018 - ieeexplore.ieee.org
Torque ripple caused by zero-sequence current (ZSC) and relatively high switching
frequency severely worsens the operating performance of an open-winding permanent …

Open-winding power conversion systems fed by half-controlled converters

Y Wang, D Panda, TA Lipo… - IEEE Transactions on …, 2012 - ieeexplore.ieee.org
An open-winding power conversion system with two conventional six-switch voltage-source
converters (VSC) affords operation with a lower volt-ampere (VA) rating of each device for a …

[PDF][PDF] 开绕组电机系统拓扑及控制技术研究综述

孙丹, 林斌, 周文志 - 电工技术学报, 2017 - dgjsxb.ces-transaction.com
摘要开绕组电机系统是将常规电机的绕组中性点打开, 两端各串接一个变换器而形成的一种双端
供电的新型电机系统拓扑结构. 开绕组电机系统具有输出功率高, 供电模式和电压矢量调制方式 …

A reduced component count five-level inverter topology for high reliability electric drives

A Karthik, U Loganathan - IEEE Transactions on Power …, 2019 - ieeexplore.ieee.org
This paper presents a reduced component count five-level inverter topology based on the
stacked cell approach to multilevel inverters. The proposed topology utilizes the …

A 5-level inverter scheme using single DC link with reduced number of floating capacitors and switches for open-end IM drives

MG Majumder, AK Yadav, K Gopakumar… - IEEE Transactions …, 2019 - ieeexplore.ieee.org
This paper presents a 5-level inverter topology for open-end induction motor drives by using
a single dc source. The open stator windings of the drive are supplied with a 3-level flying …

A reduced common-mode-voltage pulsewidth modulation method with output harmonic distortion minimization for three-level neutral-point-clamped inverters

KD Pham, N Van Nguyen - IEEE Transactions on Power …, 2019 - ieeexplore.ieee.org
This article presents a carrier-based pulsewidth modulation (PWM) strategy to reduce the
common-mode voltage (CMV) with output harmonic distortion minimization for three-level …

Investigation on extending the DC bus utilization of a single-source five-level inverter with single capacitor-fed H-bridge per phase

TT Davis, A Dey - IEEE Transactions on Power Electronics, 2018 - ieeexplore.ieee.org
Enhancement of dc bus voltage utilization for a five-level inverter with single dc source and
capacitor-fed H-bridge (CHB) units is investigated in this paper. A carrier-based modulation …

Generalised approach for predictive control with common‐mode voltage mitigation in multilevel diode‐clamped converters

V Yaramasu, B Wu, M Rivera, M Narimani… - IET Power …, 2015 - Wiley Online Library
This study proposes a generalised approach based on model predictive strategy for the
current control, dc‐link capacitor voltages balancing, switching frequency reduction and …

Multilevel voltage source inverter with optimised usage of bidirectional switches

J Jamaludin, NA Rahim, HW Ping - IET Power Electronics, 2015 - Wiley Online Library
This study presents a multilevel voltage source inverter that has been designed to reduce
circuit complexity by optimising the use of bidirectional switches. The proposed inverter is …