Modeling and analysis of through-silicon via (TSV) noise coupling and suppression using a guard ring
J Cho, E Song, K Yoon, JS Pak, J Kim… - IEEE Transactions …, 2011 - ieeexplore.ieee.org
In three-dimensional integrated circuit (3D-IC) systems that use through-silicon via (TSV)
technology, a significant design consideration is the coupling noise to or from a TSV. It is …
technology, a significant design consideration is the coupling noise to or from a TSV. It is …
Thermal characterization of interlayer microfluidic cooling of three-dimensional integrated circuits with nonuniform heat flux
It is now widely recognized that the three-dimensional (3D) system integration is a key
enabling technology to achieve the performance needs of future microprocessor integrated …
enabling technology to achieve the performance needs of future microprocessor integrated …
Through-silicon via planning in 3-D floorplanning
MC Tsai, TC Wang, TT Hwang - IEEE transactions on very large …, 2010 - ieeexplore.ieee.org
In this paper, we will study floorplanning in 3-D integrated circuits (3D-ICs). Although
literature is abundant on 3D-IC floorplanning, none of them consider the areas and positions …
literature is abundant on 3D-IC floorplanning, none of them consider the areas and positions …
Thermal modeling and analysis for 3-D ICs with integrated microchannel cooling
Integrated microchannel liquid-cooling technology is envisioned as a viable solution to
alleviate an increasing thermal stress imposed by 3-D stacked ICs. Thermal modeling for …
alleviate an increasing thermal stress imposed by 3-D stacked ICs. Thermal modeling for …
Multi-objective aerodynamic optimization of axial turbine blades using a novel multilevel genetic algorithm
Ö Öksüz, İS Akmandor - 2010 - asmedigitalcollection.asme.org
In this paper, a new multiploid genetic optimization method handling surrogate models of the
CFD solutions is presented and applied for a multi-objective turbine blade aerodynamic …
CFD solutions is presented and applied for a multi-objective turbine blade aerodynamic …
Cluster-based topologies for 3D Networks-on-Chip using advanced inter-layer bus architecture
Three-dimensional integrated circuits (3D ICs) have emerged as a viable candidate to
achieve better performance and packaging density as compared to traditional two …
achieve better performance and packaging density as compared to traditional two …
Distribution of forces between synergistics and antagonistics muscles using an optimization criterion depending on muscle contraction behavior
In this paper, a new neuromusculoskeletal simulation strategy is proposed. It is based on a
cascade control approach with an inner muscular-force control loop and an outer joint …
cascade control approach with an inner muscular-force control loop and an outer joint …
Multi-functional interconnect co-optimization for fast and reliable 3D stacked ICs
Heat removal and power delivery have become two major reliability concerns in 3D stacked
IC technology. For thermal problem, two possible solutions exist: thermal-through-silicon …
IC technology. For thermal problem, two possible solutions exist: thermal-through-silicon …
Routing-based traffic migration and buffer allocation schemes for 3-d network-on-chip systems with thermal limit
The 3-D network-on-chip (NoC) router is a major source of thermal hotspots, limiting the
performance gain of 3-D integration. Due to the varying cooling efficiency of different silicon …
performance gain of 3-D integration. Due to the varying cooling efficiency of different silicon …
A new architecture for power network in 3D IC
HT Chen, HL Lin, ZC Wang… - 2011 Design, Automation …, 2011 - ieeexplore.ieee.org
Providing high vertical interconnection density between device tiers, through silicon via
(TSV) offers a promising solution in 3D IC to reduce the length of global interconnection …
(TSV) offers a promising solution in 3D IC to reduce the length of global interconnection …