Robust ESD Capability of High-voltage nLDMOSs with Embedded Floating P+ Structures in the Drain Side
YJ Chung, SL Chen, XC Mai, TE Lin… - 2023 9th International …, 2023 - ieeexplore.ieee.org
This paper uses TCAD to simulate the modulation of a 0.18-μm 60 V nLDMOS device with a
floating P+ embedded in the drain side by dividing the drain side into one-half and …
floating P+ embedded in the drain side by dividing the drain side into one-half and …
Novel Grid-Gate 16V-nLDMOS with a Low Specific On-Resistance of 4.7mΩ.mm2Based on A Standard 0.18μm BCD Platform
J Wang, M Qiao, D Ma, Y Gao… - 2024 36th International …, 2024 - ieeexplore.ieee.org
A novel 16V Lateral Double-diffused MOSFET (LDMOS) based on a standard 0.18 μm BCD
platform is reported in this work, which uses grid-gate technology to realize the 35V off-state …
platform is reported in this work, which uses grid-gate technology to realize the 35V off-state …